參數(shù)資料
型號： MC68MH360ZQ33L
廠商： Freescale Semiconductor
文件頁數(shù)： 25/158頁
文件大?。?/td> 0K
描述： IC MPU QUICC 33MHZ 357-PBGA
標(biāo)準(zhǔn)包裝： 44
系列： M683xx
處理器類型： M683xx 32-位
速度： 33MHz
電壓： 5V
安裝類型： 表面貼裝
封裝/外殼： 357-BBGA
供應(yīng)商設(shè)備封裝： 357-PBGA（25x25）
包裝： 托盤
QMC Supplement
Figure 9-3. Time Slot Assignment Table Showing MSC Configuration
Table 9-1 describes the elds in the time slot assignment table for receive (TSATRx) when
the MSC microcode is enabled.
Table 9-1. Time Slot Assignment Table Entry Fields for Receive (MSC)
Field
Description
V
Valid bit—The valid bit indicates whether this time slot is valid.
0 The data in this 8-bit time slot is totally ignored and not written to any buffer.
1 The data in this 8-bit time slot is valid and written to the current buffer, pointed to by the channel
pointer entry, after protocol processing (for example, zero deletion in HDLC).
W
Wrap bit—Identies the last entry in TSATTx.
0 This is not the last time slot in the frame.
1 The RISC processor wraps around and handles time slot 0 or the rst 8 bits transferred from the
TSA in the next request. The next request is identied by a frame synchronization pulse.
Time Slot 0
Time Slot 1
Time Slot 30
Time Slot 31
32 x 16
Channel Pointer
W
V
Mask(2:7)
Mask(0:1)
L
Channel Pointer
W
V
Mask(2:7)
Mask(0:1)
L
Channel Pointer
W
V
Mask(2:7)
Mask(0:1)
L
Channel Pointer
W
V
Mask(2:7)
Mask(0:1)
L
Channel Pointer
W
V
Mask(2:7)
Mask(0:1)
L
Channel Pointer
W
V
Mask(2:7)
Mask(0:1)
L
Channel Pointer
W
V
Mask(2:7)
Mask(0:1)
L
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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