參數(shù)資料
型號(hào)： MC68MH360ZQ33L
廠商： Freescale Semiconductor
文件頁數(shù)： 131/158頁
文件大小： 0K
描述： IC MPU QUICC 33MHZ 357-PBGA
標(biāo)準(zhǔn)包裝： 44
系列： M683xx
處理器類型： M683xx 32-位
速度： 33MHz
電壓： 5V
安裝類型： 表面貼裝
封裝/外殼： 357-BBGA
供應(yīng)商設(shè)備封裝： 357-PBGA（25x25）
包裝： 托盤
QMC Supplement
Figure 5-2. Nonoctet Alignment Data
In the bottom case, two more bits are received. The frame length is now 13 bytes, and the
address positions X13 through X15 point to invalid data. Address position X12 contains
information about the non-octet alignment. Valid information is written starting at the MSB
position, shown as ‘x’ in the diagram. Starting from the LSB position, zeros are lled in
followed by a ‘1’ immediately preceding the valid data.
The two diagrams on the right show how the data and the extra information is stored for a
frame length that is not a multiple of 4 bytes. The additional information is always on a
long-word boundary. In the top case the frame length is 10 bytes and in the bottom case the
length is 11 bytes.
For a minimum frame consisting of ‘a(chǎn)g, 1 bit, ag’ the frame length is 1. The only valid
entry is at address XX0 with content of x1000000.
To accommodate the extra long word that may be written at the end of a frame, it is
recommended to reserve MRBLR + 4 bytes for each buffer area.
ADDRESS XX0
ADDRESS XX4
ADDRESS XX8
ADDRESS X12
1234
5678
9
101112
XTRA
0
XX
1
0
ADDRESS XX0
ADDRESS XX4
ADDRESS XX8
ADDRESS X12
1234
5678
910
XTRA
0
XX1
0
ADDRESS XX0
ADDRESS XX4
ADDRESS XX8
ADDRESS X12
1234
5678
910
ADDRESS XX0
ADDRESS XX4
ADDRESS XX8
ADDRESS X12
1234
5678
9
101112
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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