參數(shù)資料
型號: MC68MH360ZQ25L
廠商: Freescale Semiconductor
文件頁數(shù): 97/158頁
文件大?。?/td> 0K
描述: IC MPU QUICC 25MHZ 357-PBGA
標(biāo)準(zhǔn)包裝: 44
系列: M683xx
處理器類型: M683xx 32-位
速度: 25MHz
電壓: 5V
安裝類型: 表面貼裝
封裝/外殼: 357-BBGA
供應(yīng)商設(shè)備封裝: 357-PBGA(25x25)
包裝: 托盤
Chapter 2. QMC Memory Organization
Figure 2-6. Time Slot Assignment Tables for 64 Channels over 2 SCCs
1
2 34567
60 61
0
62 63
...........
24
6
60
0
62
...........
1
357
61
63
...........
TSA
SCC3
SCC2
CPM
Rx_S_PTR_2
Rx_S_PTR_3
V = 1, W = 0, C.P -> LC2
V = 1, W = 0, C.P -> LC4
V = 1, W = 0, C.P -> LC0
V = 1, W = 0, C.P -> LC60
V = 1, W = 1, C.P -> LC62
V = 1, W = 0, C.P -> LC1
V = 1, W = 0, C.P -> LC3
V = 1, W = 0, C.P -> LC5
V = 1, W = 0, C.P -> LC61
V = 1, W = 1, C.P -> LC63
SCC3 Parameter RAM
SCC2 Parameter RAM
Time Slot Assignment Table Rx
Located in SCC3 parameter RAM
Data Stream into TSA
Even Channels MUXed to SCC3
Odd Channels MUXed to SCC2
Common TSATRx located in SCC2
Parameter RAM
SCC2 Base +0x20
SCC2 Base +0x60
Tx_S_PTR_2
Tx_S_PTR_3
Located in SCC 2 parameter RAM
Common TSATTx located in SCC3
Parameter RAM
SCC3 Base + 0x20
SCC3 Base +0x60
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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