參數(shù)資料
型號: MC68MH360ZQ25L
廠商: Freescale Semiconductor
文件頁數(shù): 95/158頁
文件大?。?/td> 0K
描述: IC MPU QUICC 25MHZ 357-PBGA
標準包裝: 44
系列: M683xx
處理器類型: M683xx 32-位
速度: 25MHz
電壓: 5V
安裝類型: 表面貼裝
封裝/外殼: 357-BBGA
供應商設備封裝: 357-PBGA(25x25)
包裝: 托盤
Chapter 2. QMC Memory Organization
Figure 2-5. Rx Time Slot Assignment Table for 32 Channels over Two SCCs
Note
It is important that multiples of bytes are routed to each SCC to
delineate between time slots. Unused bits shall be routed to the
SCC and be masked in the time slot assignment table.
1
2 34567
28 29
0
30 31
...........
24
6
28
0
30
...........
1
357
29
31
...........
TSA
SCC3
SCC2
CPM
Rx_S_PTR_2
Rx_S_PTR_3
V = 1, W = 0, C.P -> LC2
V = 1, W = 0, C.P -> LC4
V = 1, W = 0, C.P -> LC0
V = 1, W = 0, C.P -> LC28
V = 1, W = 1, C.P -> LC30
V = 1, W = 0, C.P -> LC1
V = 1, W = 0, C.P -> LC3
V = 1, W = 0, C.P -> LC5
V = 1, W = 0, C.P -> LC29
V = 1, W = 1, C.P -> LC31
SCC3 Parameter RAM
SCC2 Parameter RAM
Time Slot Assignment Table Rx_2
Time Slot Assignment Table Rx_3
(not used)
Rx Data Stream into TSA
Even Channels MUXed to SCC3
Odd Channels MUXed to SCC2
Common TSATRx located in SCC2
Parameter RAM
SCC Base +0x20
SCC Base + 0x40
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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