參數(shù)資料
型號(hào): MC68HC705P6ACP
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 76/98頁(yè)
文件大小: 0K
描述: IC MCU 2.1MHZ 4.5K OTP 28-DIP
標(biāo)準(zhǔn)包裝: 13
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 2.1MHz
連通性: SIO
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 21
程序存儲(chǔ)器容量: 4.5KB(4.5K x 8)
程序存儲(chǔ)器類型: OTP
RAM 容量: 176 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.600",15.24mm)
包裝: 管件
Instruction Set
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
78
Freescale Semiconductor
BIH rel
Branch if IRQ Pin High
PC
← (PC) + 2 + rel ? IRQ = 1 — ————
REL
2F
rr
3
BIL rel
Branch if IRQ Pin Low
PC
← (PC) + 2 + rel ? IRQ = 0 — ————
REL
2E
rr
3
BIT #opr
BIT opr
BIT opr,X
BIT ,X
Bit Test Accumulator with Memory Byte
(A)
∧ (M)
— —
IMM
DIR
EXT
IX2
IX1
IX
A5
B5
C5
D5
E5
F5
ii
dd
hh ll
ee ff
ff
2
3
4
5
4
3
BLO rel
Branch if Lower (Same as BCS)
PC
← (PC) + 2 + rel ? C = 1
— ————
REL
25
rr
3
BLS rel
Branch if Lower or Same
PC
← (PC) + 2 + rel ? C ∨ Z = 1 — ————
REL
23
rr
3
BMC rel
Branch if Interrupt Mask Clear
PC
← (PC) + 2 + rel ? I = 0
— ————
REL
2C
rr
3
BMI rel
Branch if Minus
PC
← (PC) + 2 + rel ? N = 1
— ————
REL
2B
rr
3
BMS rel
Branch if Interrupt Mask Set
PC
← (PC) + 2 + rel ? I = 1
— ————
REL
2D
rr
3
BNE rel
Branch if Not Equal
PC
← (PC) + 2 + rel ? Z = 0
— ————
REL
26
rr
3
BPL rel
Branch if Plus
PC
← (PC) + 2 + rel ? N = 0
— ————
REL
2A
rr
3
BRA rel
Branch Always
PC
← (PC) + 2 + rel ? 1 = 1
— ————
REL
20
rr
3
BRCLR n opr rel Branch if Bit n Clear
PC
← (PC) + 2 + rel ? Mn = 0
— ———
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
01
03
05
07
09
0B
0D
0F
dd rr
5
BRN rel
Branch Never
PC
← (PC) + 2 + rel ? 1 = 0
— ————
REL
21
rr
3
BRSET n opr rel Branch if Bit n Set
PC
← (PC) + 2 + rel ? Mn = 1
— ———
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
00
02
04
06
08
0A
0C
0E
dd rr
5
BSET n opr
Set Bit n
Mn
← 1
— ————
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
10
12
14
16
18
1A
1C
1E
dd
5
BSR rel
Branch to Subroutine
PC
← (PC) + 2; push (PCL)
SP
← (SP) – 1; push (PCH)
SP
← (SP) – 1
PC
← (PC) + rel
— ————
REL
AD
rr
6
CLC
Clear Carry Bit
C
← 0
— ——— 0
INH
98
2
CLI
Clear Interrupt Mask
I
← 0
— 0 ———
INH
9A
2
Table 13-6. Instruction Set Summary (Sheet 2 of 6)
Source
Form
Operation
Description
Effect
on CCR
Address
Mode
Opc
o
de
Ope
rand
Cy
cl
es
HIN Z C
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