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參數(shù)資料
| 型號(hào)： | MC68EC060RC66 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 61/128頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU 32BIT 66MHZ 206-PGA |
| 標(biāo)準(zhǔn)包裝： | 10 |
| 系列： | M680x0 |
| 處理器類型： | M680x0 32-位 |
| 速度： | 66MHz |
| 電壓： | 3.3V |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 206-BEPGA |
| 供應(yīng)商設(shè)備封裝： | 206-PGA（47.25x47.25） |
| 包裝： | 托盤 |
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Introduction
1-14
M68060 USER’S MANUAL
MOTOROLA
byte. A floating-point exception handler can use the address in the 32-bit floating-point
instruction address register (FPIAR) to locate the floating-point instruction that has caused
an exception. Instructions that do not modify the FPIAR can be used to read the FPIAR in
the exception handler without changing the previous value.
1.7 DATA FORMAT SUMMARY
The MC68060 supports the basic data formats of the M68000 family. Some data formats
apply only to the integer unit, some only to the FPU, and some to both. In addition, the
instruction set supports operations on other data formats such as memory addresses.
The operand data formats supported by the integer unit are the standard twos-complement
data formats defined in the M68000 family architecture plus a new data format (16-byte
block) for the MOVE16 instruction. Registers, memory, or instructions themselves can con-
tain integer unit operands. The operand size for each instruction is either explicitly encoded
in the instruction or implicitly defined by the instruction operation.
Whenever an integer is used in a floating-point operation, the FPU automatically converts it
to an extended-precision floating-point number before using the integer. The FPU imple-
ments single-, double-, and extended-precision floating-point data formats as defined by the
IEEE 754 standard. The FPU does not directly support packed decimal real format. How-
ever, software emulation supports this format via the unimplemented data format vector.
Additionally, each data format has a special encoding that represents one of five data types:
normalized numbers, denormalized numbers, zeros, infinities, and not-a-numbers (NANs).
Table 1-1 lists the data formats for both the integer unit and the FPU. Refer to M68000PM/
AD, M68000 Family Programmer’s Reference Manual, for details on data format organiza-
tion in registers and memory.
1.8 ADDRESSING CAPABILITIES SUMMARY
The MC68060 supports the basic addressing modes of the M68000 family. The register indi-
rect addressing modes support postincrement, predecrement, offset, and indexing, which
are particularly useful for handling data structures common to sophisticated applications and
high-level languages. The program counter indirect mode also has indexing and offset capa-
bilities. This addressing mode is typically required to support position-independent software.
Besides these addressing modes, the MC68060 provides index sizing and scaling features.
Table 1-1. Data Formats
Operand Data Format
Size
Supported In
Notes
Bit
1 Bit
Integer Unit
—
Bit Field
1–32 Bits
Integer Unit
Field of Consecutive Bits
Binary-Coded Decimal (BCD)
8 Bits
Integer Unit
Packed: 2 Digits/Byte; Unpacked: 1 Digit/Byte
Byte Integer
8 Bits
Integer Unit, FPU
—
Word Integer
16 Bits
Integer Unit, FPU
—
Long-Word Integer
32 Bits
Integer Unit, FPU
—
16-Byte
128 Bits
Integer Unit
Memory Only, Aligned to 16-Byte Boundary
Single-Precision Real
32 Bits
FPU
1-Bit Sign, 8-Bit Exponent, 23-Bit Fraction
Double-Precision Real
64 Bits
FPU
1-Bit Sign, 11-Bit Exponent, 52-Bit Fraction
Extended-Precision Real
96 Bits
FPU
1-Bit Sign, 15-Bit Exponent, 64-Bit Mantissa
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