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| 型號： | MC68331CFC16B1 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 46/84頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 32BIT 16MHZ 132-PQFP |
| 標(biāo)準(zhǔn)包裝： | 180 |
| 系列： | M683xx |
| 核心處理器： | CPU32 |
| 芯體尺寸： | 32-位 |
| 速度： | 16MHz |
| 連通性： | EBI/EMI，SCI，SPI，UART/USART |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 18 |
| 程序存儲器類型： | ROMless |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 132-BQFP 緩沖式 |
| 包裝： | 托盤 |
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50
MC68331TS/D
4.7 Background Debugging Mode
The background debugger on the CPU32 is implemented in CPU microcode. The background debug-
ging commands are summarized below.
Table 21 Background Debugging Mode
Command
Mnemonic
Description
Read D/A Register
RDREG/RAREG
Read the selected address or data register and return the
results through the serial interface.
Write D/A Register
WDREG/WAREG
The data operand is written to the specified address or data
register.
Read System Register
RSREG
The specified system control register is read. All registers that
can be read in supervisor mode can be read in background
mode.
Write System Register
WSREG
The operand data is written into the specified system control
register.
Read Memory Location
READ
Read the sized data at the memory location specified by the
long-word address. The source function code register (SFC)
determines the address space accessed.
Write Memory Location
WRITE
Write the operand data to the memory location specified by the
long-word address. The destination function code (DFC)
register determines the address space accessed.
Dump Memory Block
DUMP
Used in conjunction with the READ command to dump large
blocks of memory. An initial READ is executed to set up the
starting address of the block and retrieve the first result.
Subsequent operands are retrieved with the DUMP command.
Fill Memory Block
FILL
Used in conjunction with the WRITE command to fill large
blocks of memory. Initially, a WRITE is executed to set up the
starting address of the block and supply the first operand. The
FILL command writes subsequent operands.
Resume Execution
GO
The pipe is flushed and refilled before resuming instruction
execution at the current PC.
Patch User Code
CALL
Current program counter is stacked at the location of the
current stack pointer. Instruction execution begins at user
patch code.
Reset Peripherals
RST
Asserts RESET for 512 clock cycles. The CPU is not reset by
this command. Synonymous with the CPU RESET instruction.
No Operation
NOP
NOP performs no operation and can be used as a null
command.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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