![](http://datasheet.mmic.net.cn/30000/MC68322FT16_datasheet_2368702/MC68322FT16_102.png)
Parallel Port Interface
MOTOROLA
MC68322 USER’S MANUAL
9-3
DATA
This field is an 8-bit read/write field. When read, DATA provides the latched logic levels on
the parallel port data bus when STROBE last transitioned from high to low with the PPCR’s
PDE clear. When written, the value defines the logic levels to be driven by the MC68322
when PD7–PD0 is enabled by setting the PDE bit. The most-significant bit of the DATA field
corresponds to PD7 and the least-significant bit to PD0.
The CMD and DATA fields latch the logic levels on the parallel port data bus (PD7–PD0)
and AUTOFD pins, which is used to indicate command bytes during ECP mode forward data
transfers. The CMD and DATA fields should not be read while the PDMA channel is
enabled; doing so clears the PDMA request.
INT—INIT Status (Read-only)
Indicates the level read on INIT after synchronization and optional digital filtering.
AFD—AUTOFD Status (Read-only)
Indicates the level read on AUTOFD after synchronization and optional digital filtering.
STR—STROBE Status (Read-only)
Indicates the level read on STROBE after synchronization and optional digital filtering.
SIN—SELECTIN Status (Read-only)
Indicates the level read on SELECTIN after synchronization and optional digital filtering.
ACK1—ACK Status (Read-only)
Indicates the level driven on ACK. This bit is the ACK2 bit NOR’ed with ACK from the PPI
state machine. This bit is set on reset.
BSY1—BUSY Status (Read-only)
Indicates the level driven on BUSY. This bit is the BSY2 bit OR’ed with BUSY from the PPI
state machine. This bit is set on reset.
ACK2—ACK Control
ACK2 forces a low level to be driven on ACK. This is generally done when hardware
handshaking is disabled and the PPI state machine is idle. The ACK2 bit is NOR’ed with
ACK from the PPI state machine before driving ACK. If ACK2 is set, then the ACK pin is
forced low and the ACK1 bit is cleared.
BSY2—BUSY Control
BSY2 forces a high level to be driven on BUSY. This is generally done when hardware
handshaking is disabled and the PPI state machine is idle. The BSY2 bit is OR’ed with
BUSY from the PPI state machine before driving BUSY. If BSY2 is set, then BUSY is forced
high and the BSY1 bit is set. BSY2 is set on reset.
PER—PERROR Control
Setting this bit drives a high level and clearing it drives a low level on PERROR.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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