
56F8357 Technical Data, Rev. 8.0
Freescale Semiconductor
Preliminary
3
56F8357/56F8157 Block Diagram
Program Controller
and
Hardware Looping Unit
Data ALU
16 x 16 + 36 -> 36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
Address
Generation Unit
Bit
Manipulation
Unit
PLL
Clock
Generator
EXTAL
Interrupt
Controller
4
External
Address Bus
Switch
E
I
2
External Data
Bus Switch
PDB
CDBR
CDBW
SPI0 or
GPIOE
IPBus Bridge (IPBB)
System
Integration
Module
P
O
R
O
S
C
Decoding
Peripherals
Peripheral
Device Selects
RW
Control
IPAB
IPWDB
IPRDB
2
System Bus
Control
R/W Control
PAB
Clock
resets
JTAG/
EOnCE
Port
V
CAP
V
DD
V
SS
V
DDA
V
SSA
5
4
7
6
2
V
PP
2
OCR_DIS
RESET
EXTBOOT
EMI_MODE
RSTO
4
4
6
PWM Outputs
Fault Inputs
PWMA
Current Sense Inputs or
GPIOC
3
4
6
PWM Outputs
Fault Inputs
PWMB
Current Sense Inputs or GPIOD
3
Quad
Timer D or
GPIOE
Quad
Timer C or
GPIOE
AD0
AD1
ADCA
4
5
FlexCAN
2
4
AD0
AD1
4
4
4
Quadrature
Decoder 1 or
Quad
Timer B or
SPI1 or GPIOC
4
Bus Control
6
2
8
7
9
XTAL
DS (CS1) or GPIOD9
PS (CS0) or GPIOD8
RD
GPIOD0-5 or CS2-7
WR
D7-15 or GPIOF0-8
D0-6 or GPIOF9-15
A8-15 or GPIOA0-7
GPIOB0-3 (A16-19)
GPIOB4 (A20,
prescaler_clock)
GPIOB5-7 (A21-23,
clk0-3**)
A0-5 or GPIOA8-13
A6-7 or GPIOE2-3
VREF
ADCB
16-Bit
56800E Core
2
COP/
Watchdog
CLKO
CLKMODE
IRQB
SCI1 or
GPIOD
SCI0 or
GPIOE
IRQA
6
4
1
3
XDB2
XAB1
XAB2
PAB
PDB
CDBR
CDBW
Digital Reg
Analog Reg
Low Voltage
Supervisor
**See Table 2-2
for explanation
Data Memory
4K x 16 Flash
8K x 16 RAM
Memory
Program Memory
128K x 16 Flash
2K x 16 RAM
TEMP_SENSE
Quadrature
Decoder 0 or
Quad
Timer or /
GPIOC
* Configuration
shown for on-chip
2.5V regulator
8K x 16
Boot Flash
56F8357/56F8157 General Description
Note:
Features in italics are NOT available in the 56F8157 device.
Up to 60 MIPS at 60MHz core frequency
DSP and MCU functionality in a unified,
C-efficient architecture
Access up to 4MB of off-chip program and 32MB of
data memory
Chip Select Logic for glueless interface to ROM and
SRAM
256KB of Program Flash
4KB of Program RAM
8KB of Data Flash
16KB of Data RAM
16KB Boot Flash
Up to two 6-channel PWM modules
Four 4-channel, 12-bit ADCs
Temperature Sensor
Up to two Quadrature Decoders
Optional on-chip regulator
FlexCAN module
Two Serial Communication Interfaces (SCIs)
Up to two Serial Peripheral Interfaces (SPIs)
Up to four general-purpose Quad Timers
Computer Operating Properly (COP) / Watchdog
JTAG/Enhanced On-Chip Emulation (OnCE) for
unobtrusive, real-time debugging
Up to 76 GPIO lines
160-pin LQFP Package