參數(shù)資料
型號： MC56F8157
廠商： Electronic Theatre Controls, Inc.
英文描述： 16-BIT HYBRID CONTROLLERS
中文描述： 16位混合控制器
文件頁數(shù)： 169/172頁
文件大?。?/td> 2444K
代理商： MC56F8157
Power Distribution and I/O Ring Implementation
56F8357 Technical Data, Rev. 8.0
Freescale Semiconductor
Preliminary
169
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating capacitance.
This is especially critical in systems with higher capacitive loads that could create higher transient currents
in the V
DD
and V
SS
circuits.
Take special care to minimize noise levels on the V
REF
, V
DDA
and V
SSA
pins
Designs that utilize the TRST pin for JTAG port or EOnCE module functionality (such as development or
debugging systems) should allow a means to assert TRST whenever RESET is asserted, as well as a means
to assert TRST independently of RESET. Designs that do not require debugging functionality, such as
consumer products, should tie these pins together.
Because the Flash memory is programmed through the JTAG/EOnCE port, the designer should provide an
interface to this port to allow in-circuit Flash programming
12.3 Power Distribution and I/O Ring Implementation
Figure 12-1
illustrates the general power control incorporated in the 56F8357/56F8157. This chip
contains two internal power regulators. One of them is powered from the V
DDA_OSC_PLL
pin and cannot
be turned off. This regulator controls power to the internal clock generation circuitry. The other regulator
is powered from the V
DD_IO
pins and provides power to all of the internal digital logic of the core, all
peripherals and the internal memories. This regulator can be turned off, if an external V
DD_CORE
voltage
is externally applied to the V
CAP
pins.
In summary, the entire chip can be supplied from a single 3.3 volt supply if the large core regulator is
enabled. If the regulator is not enabled, a dual supply 3.3V/2.5V configuration can also be used.
Notes:
Flash, RAM and internal logic are powered from the core regulator output
V
PP
1 and V
PP
2 are not connected in the customer system
All circuitry, analog
and
digital, shares a common V
SS
bus
Figure 12-1 Power Management
REG
CORE
V
CAP
I/O
ADC
V
DD
V
SS
REG
V
DDA_OSC_PLL
OSC
V
SSA_ADC
V
DDA_ADC
V
REFH
V
REFP
V
REFMID
V
REFN
V
REFLO
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8157VPY 制造商:Rochester Electronics LLC 功能描述:- Bulk
MC56F8157VPYE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8157VVFE 功能描述:IC DGTL SIGNAL CTLR 160-MAPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:56F8xxx 標(biāo)準(zhǔn)包裝:1 系列:87C 核心處理器:MCS 51 芯體尺寸:8-位 速度:16MHz 連通性:SIO 外圍設(shè)備:- 輸入/輸出數(shù):32 程序存儲器容量:8KB（8K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:外部 工作溫度:0°C ~ 70°C 封裝/外殼:44-DIP 包裝:管件 其它名稱:864285
MC56F8165 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
MC56F8165E 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
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