參數(shù)資料
型號： MC56F8033VLC
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP32
封裝： ROHS COMPLIANT, PLASTIC, LQFP-32
文件頁數(shù)： 48/157頁
文件大小： 2117K
代理商： MC56F8033VLC
Power Consumption
56F8033/56F8023 Data Sheet, Rev. 6
Freescale Semiconductor
141
10.18 Power Consumption
See Section 10.1 for a list of IDD requirements for the 56F8033/56F8023. This section provides additional
detail which can be used to optimize power consumption for a given application.
Power consumption is given by the following equation:
A, the internal [static component], is comprised of the DC bias currents for the oscillator, leakage currents,
PLL, and voltage references. These sources operate independently of processor state or operating
frequency.
B, the internal [state-dependent component], reflects the supply current required by certain on-chip
resources only when those resources are in use. These include RAM, Flash memory and the ADCs.
C, the internal [dynamic component], is classic C*V2*F CMOS power dissipation corresponding to the
56800E core and standard cell logic.
D, the external [dynamic component], reflects power dissipated on-chip as a result of capacitive loading
on the external pins of the chip. This is also commonly described as C*V2*F, although simulations on two
of the I/O cell types used on the 56800E reveal that the power-versus-load curve does have a non-zero
Y-intercept.
Power due to capacitive loading on output pins is (first order) a function of the capacitive load and
frequency at which the outputs change. Table 10-22 provides coefficients for calculating power dissipated
in the I/O cells as a function of capacitive load. In these cases:
TotalPower =
Σ((Intercept + Slope*Cload)*frequency/10MHz)
where:
Summation is performed over all output pins with capacitive loads
TotalPower is expressed in mW
Total power =
A: internal [static component]
+B: internal [state-dependent component]
+C: internal [dynamic component]
+D: external [dynamic component]
+E: external [static component]
Table 10-22 I/O Loading Coefficients at 10MHz
Intercept
Slope
8mA drive
1.3
0.11mW / pF
4mA drive
1.15mW
0.11mW / pF
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