參數(shù)資料
型號： MC56F8033VLC
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 32 MHz, MICROCONTROLLER, PQFP32
封裝： ROHS COMPLIANT, PLASTIC, LQFP-32
文件頁數(shù)： 115/157頁
文件大?。?/td> 2117K
代理商： MC56F8033VLC
56F8033/56F8023 Data Sheet, Rev. 6
60
Freescale Semiconductor
5.6.1
Interrupt Priority Register 0 (IPR0)
Figure 5-3 Interrupt Priority Register 0 (IPR0)
5.6.1.1
PLL Loss of Reference or Change in Lock Status Interrupt Priority Level
(PLL IPL)—Bits 15–14
This field is used to set the interrupt priority levels for the PLL Loss of Reference or Change in Lock Status
IRQ. This IRQ is limited to priorities 1 through 3. It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 1
10 = IRQ is priority level 2
11 = IRQ is priority level 3
5.6.1.2
Low Voltage Detector Interrupt Priority Level (LVI IPL)—Bits 13–12
This field is used to set the interrupt priority levels for the Low Voltage Detector IRQ. This IRQ is limited
to priorities 1 through 3 and is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 1
10 = IRQ is priority level 2
11 = IRQ is priority level 3
5.6.1.3
Reserved—Bits 11–10
This bit field is reserved. Each bit must be set to 0.
5.6.1.4
EOnCE Receive Register Full Interrupt Priority Level
(RX_REG IPL)— Bits 9–8
This field is used to set the interrupt priority level for the EOnCE Receive Register Full IRQ. This IRQ is
limited to priorities 1 through 3. It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 1
10 = IRQ is priority level 2
11 = IRQ is priority level 3
Base + $0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
PLL IPL
LVI IPL
0
RX_REG IPL
TX_REG IPL
TRBUF IPL
BKPT_U IPL
STPCNT IPL
Write
RESET
0
000
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