參數(shù)資料
型號(hào): MC56F8025VLD
廠商: Freescale Semiconductor
文件頁數(shù): 52/161頁
文件大?。?/td> 0K
描述: IC DSP 16BIT DUAL HARV 44-LQFP
標(biāo)準(zhǔn)包裝: 800
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,LIN,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 35
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 2K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 44-LQFP
包裝: 托盤
Equivalent Circuit for ADC Inputs
56F8035/56F8025 Data Sheet, Rev. 6
Freescale Semiconductor
145
10.15 Equivalent Circuit for ADC Inputs
Figure 10-17 illustrates the ADC input circuit during sample and hold. S1 and S2 are always open/closed
at the same time that S3 is closed/open. When S1/S2 are closed and S3 is open, one input of the sample
and hold circuit moves to (VREFHx - VREFLx) / 2, while the other charges to the analog input voltage. When
the switches are flipped, the charge on C1 and C2 are averaged via S3, with the result that a single-ended
analog input is switched to a differential voltage centered about (VREFHx - VREFLx) / 2. The switches
switch on every cycle of the ADC clock (open one-half ADC clock, closed one-half ADC clock). Note that
there are additional capacitances associated with the analog input pad, routing, etc., but these do not filter
into the S/H output voltage, as S1 provides isolation during the charge-sharing phase.
One aspect of this circuit is that there is an on-going input current, which is a function of the analog input
voltage, VREF, and the ADC clock frequency.
1.
Parasitic capacitance due to package, pin-to-pin and pin-to-package base coupling; 1.8pF
2.
Parasitic capacitance due to the chip bond pad, ESD protection devices and signal routing; 2.04pF
3.
Equivalent resistance for the channel select mux; 100 ohms
4.
Sampling capacitor at the sample and hold circuit. Capacitor C1 is normally disconnected from the input and is only
connected to it at sampling time; 1.4pF
Figure 10-17 Equivalent Circuit for A/D Loading
5. LSB = Least Significant Bit = 0.806mV
6. Pin groups are detailed following Table 10-1.
7. The current that can be injected or sourced from an unselected ADC signal input without impacting the performance of the
ADC.
1
2
3
Analog Input
4
S1
S2
S3
C1
C2
S/H
C1 = C2 = 1pF
(VREFHx - VREFL x) / 2
125
Ω ESD Resistor
8pF noise damping capacitor
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