參數(shù)資料
型號: MC56F8025VLD
廠商: Freescale Semiconductor
文件頁數(shù): 160/161頁
文件大?。?/td> 0K
描述: IC DSP 16BIT DUAL HARV 44-LQFP
標準包裝: 800
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 32MHz
連通性: I²C,LIN,SCI,SPI
外圍設備: POR,PWM,WDT
輸入/輸出數(shù): 35
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: 閃存
RAM 容量: 2K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 8x12b,D/A 2x12b
振蕩器型: 內部
工作溫度: -40°C ~ 105°C
封裝/外殼: 44-LQFP
包裝: 托盤
56F8035/56F8025 Data Sheet, Rev. 6
98
Freescale Semiconductor
01 = FAULT2 - PWM FAULT2 Input
10 = TA3 - Timer A3
11 = Reserved
6.3.16.4
Configure GPIOA4 (GPS_A4)—Bits 9–8
This field selects the alternate function for GPIOA4.
00 = PWM4 - PWM4 (default)
01 = FAULT1 - PWM FAULT1 Input
10 = TA2 - Timer A2
11 = Reserved
6.3.16.5
Reserved—Bits 7–0
This bit field is reserved. Each bit must be set to 0.
6.3.17
SIM GPIO Peripheral Select Register 1 for GPIOA (SIM_GPSA1)
See Section 6.3.16 for general information about GPIO Peripheral Select Registers.
Figure 6-20 GPIO Peripheral Select Register 1 for GPIOA (SIM_GPSA1)
6.3.17.1
Reserved—Bits 15–7
This bit field is reserved. Each bit must be set to 0.
6.3.17.2
Configure GPIOA11 (GPS_A11)—Bit 6
This field selects the alternate function for GPIOA11.
0 = CINB - Comparator B Input 2 (default)
1 = Reserved
6.3.17.3
Reserved—Bit 5
This bit field is reserved. It must be set to 0.
6.3.17.4
Configure GPIOA10 (GPS_A10)—Bit 4
This field selects the alternate function for GPIOA10.
0 = CINA- Comparator A Input 2 (default)
1 = Reserved
6.3.17.5
Configure GPIOA9 (GPS_A9)—Bits 3–2
This field selects the alternate function for GPIOA9.
Base + $14
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
GPS_
A11
0
GPS_
A10
GPS_A9
GPS_A8
Write
RESET
0
00000
0
0000
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