參數(shù)資料
型號： MC56F8014VFAE
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數(shù)字信號處理
英文描述： 0-BIT, 8 MHz, OTHER DSP, PQFP32
封裝： ROHS COMPLIANT, PLASTIC, LQFP-32
文件頁數(shù)： 74/124頁
文件大小： 1681K
代理商： MC56F8014VFAE
Register Descriptions
56F8014 Technical Data, Rev. 11
Freescale Semiconductor
53
5.5.3.8
GPIOA Interrupt Priority Level (GPIOA IPL)—Bits 1–0
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
It is disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.4
Interrupt Priority Register 3 (IPR3)
Figure 5-6 Interrupt Priority Register 3 (IPR3)
5.5.4.1
ADCA Conversion Complete Interrupt Priority Level
(ADCA_CC IPL)—Bits 15–14
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.4.2
Timer Channel 3 Interrupt Priority Level (TMR_3 IPL)—Bits 13–12
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.4.3
Timer Channel 2 Interrupt Priority Level (TMR_2 IPL)—Bits 11–10
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
Base + $3
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
ADCA_CC IPL
TMR_3 IPL
TMR_2 IPL
TMR_1 IPL
TMR_0 IPL
I2C_ADDR
IPL
0
Write
RESET
0
000
00
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