參數資料
型號: MC56F8014VFAE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數字信號處理
英文描述: 0-BIT, 8 MHz, OTHER DSP, PQFP32
封裝: ROHS COMPLIANT, PLASTIC, LQFP-32
文件頁數: 17/124頁
文件大?。?/td> 1681K
代理商: MC56F8014VFAE
Equivalent Circuit for ADC Inputs
56F8014 Technical Data, Rev. 11
Freescale Semiconductor
113
10.15 Equivalent Circuit for ADC Inputs
Figure 10-17 illustrates the ADC input circuit during sample and hold. S1 and S2 are always open/closed
at the same time that S3 is closed/open. When S1/S2 are closed & S3 is open, one input of the sample and
hold circuit moves to (VREFH-VREFL)/2, while the other charges to the analog input voltage. When the
switches are flipped, the charge on C1 and C2 are averaged via S3, with the result that a single-ended
analog input is switched to a differential voltage centered about (VREFH-VREFL)/2. The switches switch
on every cycle of the ADC clock (open one-half ADC clock, closed one-half ADC clock). Note that there
are additional capacitances associated with the analog input pad, routing, etc., but these do not filter into
the S/H output voltage, as S1 provides isolation during the charge-sharing phase.
One aspect of this circuit is that there is an on-going input current, which is a function of the analog input
voltage, VREF and the ADC clock frequency.
5. LSB = Least Significant Bit = 0.806mV
6. Pin groups are detailed following Table 10-1.
7. The current that can be injected or sourced from an unselected ADC signal input without impacting the performance of the
ADC.
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