MultiMediaCard
TM
77
Sep.22.2005
Revision 0.3
Figure 6-19 : Stop Transmission After Last Data Block. Card Is Busy Programming.
Figure 6-20 : Stop Transmission After Last Data Block. Card Becomes Busy.
Erase, Set and Clear Write Protect Timing
The host must first select the erase groups to be erased using the erase start and end command (CMD35, CMD36). The
erase command (CMD38), once issued, will erase all selected erase groups. Similarly, set and clear write protect com-
mands start a programming operation as well. The card will signal “busy” (by pulling the DAT0 line low) for the duration of
the erase or programming operation. The bus transaction timings are identical to the variation of the stop transmission
described in Figure 6-20.
Reselecting a busy card
When a busy card which is currently in the dis state is reselected it will reinstate its busy signaling on the data line DAT0.
The timing diagram for this command / response / busy transaction is given in Figure 6-20.
6.15
Bus Test Procedure Timing
After reaching the Tran-state a host can initiate the Bus Testing procedure. If there is no response to the CMD19 sent by
the host, the host should read the status from the card with CMD13. If there was no response to CMD19, the host may
assume that this function is not supported by the card.
Figure 6-21: 4 bit System Bus Testing Procedure
←
Host Command
→←
N
CR
Cycles
→ ←
Card Response
→
S T
content
CRC E Z Z P * * * P S T
←
Busy (Card is programming)
L L
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
X X
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
←
Host Cmnd
Content
CMD
content
→
CRC E Z Z P P P P S T
DAT0
DAT1-7
L E Z Z Z Z Z Z Z Z
X X Z Z Z Z Z Z Z Z
←
Host Command
→←
N
CR
Cycles
→ ←
Card Response
→
S T
content
CRC E Z Z P * * * P S T
←
N
ST
→
←
Busy (Card is programming)
→
Z Z Z Z Z Z Z Z Z Z Z S L
* * * * * * * * * * * * * * * * * * * * *
Z Z Z Z Z Z Z Z Z Z Z X X
* * * * * * * * * * * * * * * * * * * * *
←
Host Cmnd
Content
CMD
content
CRC E Z Z P P P P S T
DAT0
DAT1-7
L E Z Z Z Z Z Z Z Z
X X Z Z Z Z Z Z Z Z
CMD
CMD19
RSP19
CMD14
RSP14
CMD6
RSP6
←
N
WR
→
←
N
RC
→
←
N
AC
→
←
N
RC
→
DAT0
DAT1
DAT2
DAT3
DAT4-7
Z Z * * * * * * * Z Z Z
Z Z * * * * * * * Z Z Z
Z Z * * * * * * * Z Z Z
Z Z * * * * * * * Z Z Z
Z Z * * * * * * * Z Z Z
S 10 X X X E
S 01 X X X E
S 10 X X X E
S 01 X X X E
Z Z * * * Z Z Z
Z Z * * * * * * * Z Z Z
Z Z * * * * * * * Z Z Z
Z Z * * * * * * * Z Z Z
Z Z * * * * * * * Z Z Z
Z Z * * * * * * * Z Z Z
S 01 000000 CRC16 E
S 10 000000 CRC16 E
S 01 000000 CRC16 E
S 10 000000 CRC16 E
S 00 000000 CRC16 E
Z Z * * * * * * * Z Z Z
Z Z * * * * * * * Z Z Z
Z Z * * * * * * * Z Z Z
Z Z * * * * * * * Z Z Z
Z Z * * * * * * * Z Z Z
Stuff bits
Optional