參數(shù)資料
型號： MC4GH02GNMCA-2SA00
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： SAMSUNG MultiMediaCard
中文描述： 三星多媒體
文件頁數(shù)： 46/102頁
文件大?。?/td> 1384K
代理商： MC4GH02GNMCA-2SA00
MultiMediaCard
TM
46
Sep.22.2005
Revision 0.3
6.2.5 Bus Width Selection
After the host has verified the functional pins on the bus it should change the bus width configuration accordingly, using
the SWITCH command.
The bus width configuration is changed by writing to the BUS_WIDTH byte in the Modes Segment of the EXT_CSD regis-
ter (using the SWITCH command to do so). After power-on, or software reset, the contents of the BUS_WIDTH byte is
0x00.
The valid values for this register are defined in ’BUS_WIDTH’, in page 86. If the host tries to write an invalid value, the
BUS_WIDTH byte is not changed and the SWITCH_ERROR bit is set. This register is write only.
6.2.6 Data Read
The DAT0-DAT7 bus line levels are high when no data is transmitted. A transmitted data block consists of a start bit
(LOW), on each DAT line, followed by a continuous data stream. The data stream contains the payload data (and error
correction bits if an off-card ECC is used). The data stream ends with an end bit (HIGH), on each DAT line (see Figure 6-
12 - Figure 6-14). The data transmission is synchronous to the clock signal.
The payload for block oriented data transfer is protected by a CRC check sum, on each DAT line (see Chapter 6.4).
Data
line
Data pattern sent by the host
Reversed pattern sent by the card
Notes
DAT0
0,10xxxxxxxxxx,[CRC16],1
0,01000000,[CRC16],1
Start bit defines beginning of pattern
DAT1
0,01xxxxxxxxxx,[CRC16],1
0,10000000,[CRC16],1
DAT2
0,10xxxxxxxxxx,[CRC16],1
0,01000000,[CRC16],1
DAT3
0,01xxxxxxxxxx,[CRC16],1
0,10000000,[CRC16],1
DAT4
0,00000000,[CRC16],1
No data pattern sent
DAT5
0,00000000,[CRC16],1
No data pattern sent
DAT6
0,00000000,[CRC16],1
No data pattern sent
DAT7
0,00000000,[CRC16],1
No data pattern sent
Data
line
Data pattern sent by the host
Reversed pattern sent by the card
Notes
DAT0
0,10xxxxxxxxxx,[CRC16],1
0,01000000,[CRC16],1
Start bit defines beginning of pattern
DAT1
0,01xxxxxxxxxx,[CRC16],1
0,10000000,[CRC16],1
DAT2
0,10xxxxxxxxxx,[CRC16],1
0,01000000,[CRC16],1
DAT3
0,01xxxxxxxxxx,[CRC16],1
0,10000000,[CRC16],1
DAT4
0,10xxxxxxxxxx,[CRC16],1
0,01000000,[CRC16],1
DAT5
0,01xxxxxxxxxx,[CRC16],1
0,10000000,[CRC16],1
DAT6
0,10xxxxxxxxxx,[CRC16],1
0,01000000,[CRC16],1
DAT7
0,01xxxxxxxxxx,[CRC16],1
0,10000000,[CRC16],1
Table 6-5 : 8-bit Bus Testing Pattern
Table 6-4 : 4-bit Bus Testing Pattern
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