MultiMediaCard
TM
4
Sep.22.2005
Revision 0.3
7.6 Bus Transfer Protection.......................................................................................................................
7.7 Data Read...........................................................................................................................................
7.8 Data Write...........................................................................................................................................
7.9 Erase and Write Protect Management................................................................................................
7.10 Read CSD/CID Registers..................................................................................................................
7.11 Reset Sequence................................................................................................................................
7.12 Clock Control.....................................................................................................................................
7.13 Error Conditions................................................................................................................................
7.14 Read Ahead in Multiple Block Operation...........................................................................................
7.15 Memory Array Partioning...................................................................................................................
7.16 Card Lock/Unlock Operation.............................................................................................................
7.17 SPI Command Set.............................................................................................................................
7.18 Responses........................................................................................................................................
7.19 Data Tokens......................................................................................................................................
7.20 Data Token Error...............................................................................................................................
7.21 Clearing Status Bits...........................................................................................................................
7.22 Card Registers..................................................................................................................................
7.23 SPI Bus Timing Diagrams..................................................................................................................
7.24 Timing Values....................................................................................................................................
7.25 SPI Electrical Interface.......................................................................................................................
7.26 SPI Bus Operating Coditions.............................................................................................................
7.27 SPI Bus Timing..................................................................................................................................
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