參數(shù)資料
型號: MC33410FTA
廠商: MOTOROLA INC
元件分類: 無繩電話/電話
英文描述: DUAL CVSD/PLL CORDLESS PHONE SYSTEM
中文描述: TELECOM, CORDLESS, SUPPORT CIRCUIT, PQFP48
封裝: PLASTIC, LQFP-48
文件頁數(shù): 4/20頁
文件大小: 300K
代理商: MC33410FTA
MC33410
4
MOTOROLA RF/IF DEVICE DATA
RECOMMENDED OPERATING CONDITIONS
(Subject to change)
Parameter
Symbol
Min
Typ
Max
Units
Supply Voltage
2.7 to 5.5
V
CVSD Clock Rate
32, 50, or
64
kHz
Encoder in Signal Level (max)
3.0
Vpp
mA
Peak Output Current at PAO+, PAO–
±
5.0
Reference Frequency Amplitude (Fref In)
Rx Digital Input Signal Amplitude
Min
Max
>200
mVpp
Vpp
0.20
0 to VCC
4.0 to
18.25
Crystal or Reference Frequency at Pin 14
MHz
Max. Input Frequency at FRx, FTx
LO2 VCO Control Voltage (Pin 44)
TBD
MHz
TBD
V
Max. 2nd LO Frequency
80
MHz
12 Bit Reference Counter Range (Note 1)
3 to 4095
13 Bit N Counter Range (Note 1)
3 to 8191
7 Bit A Counter Range (Note 1)
with a 64/65 Modulus Prescaler
with a 128/129 Modulus Prescaler
0 to 63
0 to 127
14 Bit LO2 Counter Range (Note 1)
12 to
16383
6 Bit Counters (for SCF and Encode Clock) (Note 1)
3 to 63
Receive Path Gain Control Code Range (Note 1)
6 to 25
Operating Ambient Temperature
–40 to 85
°
C
NOTES:
1.Values specified are pure numbers to the base 10.
2.Above specs represent design objectives, and are subject to change.
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1
FRx MC
Modulus Control Output to the Rx 64/65 or 128/129 dual modulus prescaler.
2
FRx
Input to the Rx PLL.
3
PLL VCC
Supply pin for the Rx PLL section. Allowable range is 2.7 to 5.5 V.
4
Rx PD
Phase detector charge pump output of the Rx PLL.
5
PLL Gnd
Ground pin for the PLL sections.
PIN FUNCTION DESCRIPTION
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Pin
Name
Description
6
Tx PD
PLL VCC
FTx
FTx MC
EN
Phase detector charge pump output of the Tx PLL.
Supply pin for the Tx PLL section and the MPU Serial Interface section. Allowable range is 2.7 to 5.5 V.
Input to the Tx PLL.
Modulus Control Output to the Tx 64/65 or 128/129 dual modulus prescaler.
Enable input for the
μ
P port. This signal latches in the register address and data.
7
8
9
10
11
CLK
Clock input for the
μ
P port. Maximum frequency is 2.0 MHz.
12
Data
Bi–directional data line for the
μ
P port. In Data Modem mode, this pin provides the recovered clock.
13
Status
Logic output which indicates that a predetermined 16 or 24–bit code word has been detected in the Data
Detect register, and the following data word has been loaded into register 10. In Data Modem mode, this
pin provides the Transmit Data clock.
14, 15
Fref In,
Fref Out
A crystal, in the range of 4.0 to 18.25 MHz can be connected to these pins to provide the reference
frequency. If an external reference source is used, it is to be capacitively coupled to Fref In.
NOTE:
1. All VCC pins must be within
±
0.5 V of each other.
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