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參數(shù)資料
| 型號： | MC33410FTA |
| 廠商： | MOTOROLA INC |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | DUAL CVSD/PLL CORDLESS PHONE SYSTEM |
| 中文描述： | TELECOM, CORDLESS, SUPPORT CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 14/20頁 |
| 文件大小： | 300K |
| 代理商： | MC33410FTA |
MC33410
14
MOTOROLA RF/IF DEVICE DATA
áááááááááááááááááááááááááááááááááá
(16 bits total)
1
0
Mutes the receive speech processing path (Pin 30).
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áááááááááááááááááááááááááááááááá
2
0
Mutes the transmit speech processing path (Pin 22).
3
0
Selects the Rx 1010 Generator to the CVSD decoder.
Selects the Tx 1010 Generator to the scrambler.
Sets Carrier Detect Mode vs. Low Battery mode.
4
0
5
0
10 – 6
01111
Provides 19 steps, 1.5 dB each (28.5 dB range), of gain adjust in the receive speech
audio path (Pins 32 to 30). See Table 8.
15 – 11
00100
Provides 4 steps of 4.0 dB each, for the remote gain adjust in the transmit speech
audio path (Pins 23 to 20).
7
(24 bits total)
0
0
Bypass the Clock Recovery Block (Data slicer output goes directly to the
descrambler).
1
0
Bypass the scrambler and descrambler.
2
0
Disables the automatic idle channel detect at the CVSD encoder. Bit 5/21 is still active.
3
0
Bypass the Data Detect block (Descrambler output goes directly to the CVSD
Decoder).
5 – 4
00
Determines the function for Pin 36 (MP1). See Table 6.
7 – 6
00
Determines the function for Pin 39 (MP2). See Table 7.
10 – 8
010
Selects one of 8 programmable taps in the scrambler and descrambler. See Table 5.
11
1
Sets the code word size to be sent out via the Tx Data Register to 24 bits. If this bit is
0, the code word size is 16 bits.
12
1
Sets the data word size to be sent out via the Tx Data Register to 24 bits. If this bit is 0,
the data word size is 16 bits.
13
0
Sets the FTx MC and FRx MC output level to be from ground to VCC. If this bit is 0, the
output level is
±
100
μ
A.
14
0
Disables the CVSD charge compensation circuit.
17 – 15
000
Test modes for production testing only.
20 – 18
000
Selects the value of the internal capacitor between Pins 43 to 45, to fine tune the LO2
tank circuit. See Table 9.
21
0
Sets the polarity of the 2nd LO phase detector charge pump output for an inverting low
pass filter/VCO combination.
22
0
Sets the polarity of the Rx phase detector charge pump output for an inverting low
pass filter/VCO combination.
23
0
Sets the polarity of the Tx phase detector charge pump output for an inverting low pass
filter/VCO combination.
8
23 – 0
$000000
Code word for the Tx Data Register is entered into this register.
Data word for the Tx Data Register is entered into this register.
The data word received into the Rx Data Register is read out via the
μ
P port from this
register.
9
23 – 0
$000000
10
23 – 0
$000000
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