
MC33298
14
MOTOROLA ANALOG IC DEVICE DATA
routine ensures an orderly startup of the loads. The
MC33298 does not detect an overvoltage on the VDD pin.
Other external circuitry, such as the Motorola MC33161
Universal Voltage Monitor, is necessary to accomplish this
function.
Output Off Open Load Fault
An Output Off Open Load Fault is the detection and
reporting of an “open” load when the corresponding output is
disabled (input in a logic high state). To understand the
operation of the Open Load Fault detect circuit, see
Figure 17. The Output Off Open Load Fault is detected by
comparing the drain voltage of the specific MOSFET output
to an internally generated reference. Each output has one
dedicated comparator for this purpose.
Figure 17. Output “Off” Open Load Detect
MC33298
RL
VPWR
MOSFET “Off”
Low = Fault
50
μ
A
VThres
0.6 to 0.8 x VDD
Output
An Output Off Open Load Fault is indicated when the
output voltage is less than the Output Threshold Voltage
(VThres) of 0.6 to 0.8 x VDD. Since the MC33298 outputs
function as switches, during normal operation, each
MOSFET output should either be completely turned “on” or
“off.” By design the threshold voltage was selected to be
between the “on” and “off” voltage of the MOSFET. During
normal operation, the “on” state VDS voltage of the MOSFET
is less than the threshold voltage and the “off” state VDS
voltage is greater than the threshold voltage. This design
approach affords using the same threshold comparator for
Output Open Load Detect in the “off” state and Short Circuit
Detect in the “on” state. See Figure 18 for an understanding
of the Short Circuit Detect circuit. With VDD = 5.0 V, an “off”
state output voltage of less than 3.0 V will be detected as an
Output Off Open Load Fault while voltages greater than 4.0 V
will not be detected as a fault.
The MC33298 has an internal pull–down current source of
50
μ
A, as shown in Figure 17, between the MOSFET drain
and ground. This prevents the output from floating up to
VPWR if there is an open load or internal wirebond failure. The
internal comparator compares the drain voltage with a
reference voltage, VThres (0.6 to 0.8 x VDD). If the output
voltage is less than this reference voltage, the MC33298 will
declare the condition to be an open load fault.
During steady–state operation, the minimum load
resistance (RL) needed to prevent false fault reporting during
normal operation can be found as follows:
VPWR = 9.0 V (min)
ILCO = 50
μ
A
VThres (max) = (0.8 x 5.5)V = 4.4 V
Therefore, the load resistance necessary to prevent false
open load fault reporting is (using Ohm’s Law) equal to 92 k
or less.
During output switching, especially with capacitive loads,
a false Output Off Open Load Fault may be triggered. To
prevent this false fault from being reported an internal fault
filter of 25 to 100
μ
s is incorporated. The duration for which a
false fault may be reported is a function of the load
impedance (RL, CL, LL), RDS(on), and Cout of the MOSFET as
well as the supply voltage, VPWR. The rising edge of CSB
triggers a built in fault delay timer which must time out (25
to 100
μ
s) before the fault comparator is enabled to detect a
faulted threshold. The circuit automatically returns to normal
operation once the condition causing the Open Load Fault
is removed.
Shorted Load Fault
A shorted load (overcurrent) fault can be caused by any
output being shorted directly to supply, or an output
experiencing a current greater than the current limit.
There are three safety circuits progressively in operation
during load short conditions which afford system protection:
1) The device’s output current is monitored in an analog
fashion using a SENSEFET
approach and limited; 2) The
device’s output current limit threshold is sensed by
monitoring the MOSFET drain voltage; and 3) The device’s
output thermal limit is sensed and when attained causes only
the specific faulted output to be latched “off,” allowing
remaining outputs to operate normally. All three protection
mechanisms are incorporated in each output affording robust
independent output operation.
The analog current limit circuit is always active and
monitors the output drain current. An overcurrent condition
causes the gate control circuitry to reduce the gate to source
voltage imposed on the output MOSFET which
re–establishes the load current in compliance with current
limit (3.0 to 6.0 A) range. The time required for the current
limit circuitry to act is less than 20
μ
s. Therefore, currents
higher than 3.0 to 6.0 A will never be seen for more than 20
μ
s
(a typical duration is 10
μ
s). If the current of an output
attempts to exceed the predetermined limit of 3.0 to 6.0 A
(4.0 A nominal), the VDS voltage will exceed the VThres
voltage and the overcurrent comparator will be tripped as
shown in Figure 18.
Figure 18. Short Circuit Detect and Analog
Current Limiting Circuit
MC33298
RL
VPWR
MOSFET “On”
High = Fault
VThres
0.6 to 0.8 x VDD
Output
Analog
Digital
Vref