參數(shù)資料
型號: MBM30LV0128-PFTN
廠商: FUJITSU LTD
元件分類: DRAM
英文描述: 128 M (16 M X 8) BIT NAND-type
中文描述: 16M X 8 FLASH 2.7V PROM, PDSO48
封裝: PLASTIC, TSOP-48
文件頁數(shù): 31/43頁
文件大?。?/td> 397K
代理商: MBM30LV0128-PFTN
MBM30LV0064
31
(6) R/B: Termination of the Ready/Busy pin (R/B)
The R/B is open-drain output. When using the R/B, R/B must be pulled up V
CC
by a resistor.
(7) Power On/Off Sequence:
After power-off, each input signal level may be undefined. Use the WP signal as shown in the figure below.
Device
V
CC
V
CC
R
C
L
R/B
V
SS
V
CC
(Max.) — V
OL
I
OL
+ I
L
3.2 V
8 mA + I
L
R =
=
Figure 28 Termination for R/B
2.7 V
2.5 V
V
CC
0 V
CE, WE, RE
CLE, ALE
WP
DON’T
CARE
V
IL
V
IH
Operation
DON’T
CARE
V
IL
Figure 29 Power On/Off Sequence
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