參數(shù)資料
型號: MB95R203PF-G-JNE2
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PDSO20
封裝: 12.70 X 7.50 MM, 1.27 MM PITCH, 2.65 MM HEIGHT, PLASTIC, SOP-20
文件頁數(shù): 19/56頁
文件大?。?/td> 1935K
代理商: MB95R203PF-G-JNE2
MB95R203
26
DS07-12625-4E
4.
AC Characteristics
(1) Clock Timing
(Vcc
= 3.3 V, Vss = 0.0 V, TA = 20 °C to +70 °C)
Parameter
Sym-
bol
Pin name
Condi-
tion
Value
Unit
Remarks
Min
Typ
Max
Clock frequency
FCH
X0, X1
1
10
MHz
When the main
oscillation circuit is used
X0, X1,
HCLK1,
HCLK2
1
20
MHz
When the main external
clock is used
FCRH
0.95
1
1.05
MHz
When the main internal
CR clock is used
(3.0 V
≤ VCC ≤ 3.6 V,
+ 5 °C ≤ TA ≤ + 35 °C)
FCL
X0A, X1A
32.768
MHz
When the sub oscillation
circuit is used
32.768
kHz
When the sub external
clock is used
FCRL
50
100
200
kHz
When the sub internal
CR clock is used
Clock cycle time
tHCYL
X0, X1
100
1000
ns
When the main
oscillation circuit is used
X0, X1,
HCLK1,
HCLK2
50
1000
ns
When the main external
clock is used
tLCYL
X0A, X1A
30.5
μs When using sub clock
Input clock pulse
width
tWH1
X0,
HCLK1,
HCLK2
20
ns
When the external clock
is used, the duty ratio
should range between
40% and 60%
tWL1
tWH2
X0A
15.2
μs
tWL2
Input clock rise
time and fall time
tCR
X0, X0A,
HCLK1,
HCLK2
5ns
When the external clock
is used
tCF
Internal CR
oscillation start time
tCRHWK
10
μs
When the main-internal
CR clock is used
tCRLWK
10
μs
When the sub-internal
CR clock is used
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