參數(shù)資料
型號(hào): MB91F249PFV-GSE1
廠商: FUJITSU LTD
元件分類(lèi): 微控制器/微處理器
英文描述: 32-BIT, FLASH, 32 MHz, RISC MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁(yè)數(shù): 37/84頁(yè)
文件大小: 2105K
代理商: MB91F249PFV-GSE1
MB91245/S Series
42
DS07-16803-3E
■ TABLE OF PIN STATUS IN EACH MODE
Single chip mode
(Continued)
Pin
name
Function name
Initial value
In sleep
state
In stop state
INIT
= “L”
INIT
= “H”
HIZ
= 0
HIZ
= 1
INIT
Input
enabled
Input
enabled
Input
enabled
Input enabled Input enabled
X0
Hi-Z or input
enabled
Hi-Z or input
enabled
X1
”H” output or
input enabled
”H” output or
input enabled
X0A
Hi-Z or input
enabled
Hi-Z or input
enabled
X1A
”H” output or
input enabled
”H” output or
input enabled
MOD0
Input enabled Input enabled
MOD1
MOD2
P00
P00/SEG24/INT0/D00
Output Hi-Z
input
enabled
Output Hi-Z
input
enabled
P :
Immediately
preceding
status held
F :
Normal
operation
performed
P :
Immediately
preceding
status held
F :
Operation or
output held
during LCDC
output; INT0
to INT5 input
enabled when
PFR0 register
is set to “0”
Operation or
output held
during LCDC
output,
otherwise
output Hi-Z /
INT0 to INT5
input enabled
when PFR0
register is set
to “0”
P01
P01/SEG25/INT1/D01
P02
P02/SEG26/INT2/D02
P03
P03/SEG27/INT3/D03
P04
P04/SEG28/INT4/D04
P05
P05/SEG29/INT5/D05
P06
P06/SEG30/D06
P :
Immediately
preceding
status held
F :
Operation or
output held
during LCDC
output;
Otherwise
Hi-Z
Operation or
output held
during LCDC
output;
Otherwise
output Hi-Z/
Input fixed to
“0”
P07
P07/SEG31/ATG/D07
P10
to
P17
P10 to P17/
SEG16 to SEG23/
D08 to D15
P20
to
P27
P20 to P27/
SEG00 to SEG07/
A00 to A07
“L” output
P30
to
P33
P30 to P33/
SEG08 to SEG11/
A08 to A11
P34
to
P37
P34 to P37/
SEG12 to SEG15/
A12 to A15
Output Hi-Z
input
enabled
Output Hi-Z
input
enabled
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