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參數(shù)資料
| 型號： | MB91F249PFV-GSE1 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 32 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 17/84頁 |
| 文件大?。?/td> | 2105K |
| 代理商： | MB91F249PFV-GSE1 |
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MB91245/S Series
24
DS07-16803-3E
■ MODE SETTINGS
The FR family, sets the operation mode using mode pins (MOD2 to MOD0) and mode data.
Mode pins
The mode pins (MOD2 to MOD0) specify how the mode vector fetch and reset vector fetch is performed.
Other settings than these in the table are prohibited.
Mode data
Data written to the internal mode register (MODR) by mode vector fetch is called mode data.
After an operating mode has been set in the mode register the device operates in that operating mode.
The mode data is set by all reset sources. User programs cannot set data to the mode register.
Detailed description of mode data
Bit 31 to bit 24 are reserved.
Always set the value to “00000111B”. Normal operation is not guaranteed when a value other than “00000111B”
is set.
Note : Mode data set in the mode vector must be placed as byte data at 0x000FFFF8H.
Place the data in the most significant byte from bit 31 to bit 24 as the FR family uses the big endian system
for byte endian.
Mode pin
Mode name
Reset vector access area
MOD2
MOD1
MOD0
0
Internal ROM mode vector
Internal
0
1
External ROM mode vector
External
31
30
29
28
27
26
25
24
00
01
11
bit
Operating mode
setting bits
31
24 23
16 15
8 7
0
XXXXXXXX
0x000FFFF8H
0x000FFFFCH
XXXXXXXX
Mode Data
XXXXXXXX
Mode Data
bit
Incorrect
Correct
Reset vector
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