參數資料
型號: MB91F133PMT2
廠商: FUJITSU LTD
元件分類: 微控制器/微處理器
英文描述: 32-Bit RISC Microcontroller
中文描述: 32-BIT, FLASH, 33 MHz, RISC MICROCONTROLLER, PQFP144
封裝: PLASTIC, LQFP-144
文件頁數: 87/123頁
文件大?。?/td> 1362K
代理商: MB91F133PMT2
MB91133/MB91F133
87
Sector address table
Registers of FLASH Memory
There are two types of FLASH memory registers, namely status register (FLCL) and wait register (FWTC).
Status Register (FLCR) (CPU mode)
This register indicates the operation status of the FLASH memory. It controls interruption to the CPU and
writing to the FLASH memory.
Access is possible only in CPU mode. This register must not be accessed under Read / Modify / Write
instructions.
Wait Register ( FWTC)
Carries out wait control of the FLASH memory in CPU mode. Also, controls access to high-speed reading
(33MHz) of FLASH memory. Configuration of Wait Register (FWTC) is as follows :
Note : FACH bit should be set to 1 or WTC1/0 should be set to 01b to operate machine clocks of CPUs exceeding
25 MHz.
Sector Address
Address Area
Position of bit
handled
Sector Capacity
SA5
000C0802, 3h to 000DFFFE, Fh (LSB side 16 bit)
bit 15 to 0
63 Kbyte
SA6
000E0002, 3h to 000EFFFE, Fh (LSB side 16 bit)
bit 15 to 0
32 Kbyte
SA7
000F0002, 3h to 000F3FFE, Fh (LSB side 16 bit)
bit 15 to 0
8 Kbyte
SA8
000F4002, 3h to 000F7FFE, Fh (LSB side 16 bit)
bit 15 to 0
8 Kbyte
SA9
000F8002, 3h to 000FFFFE, Fh (LSB side 16 bit)
bit 15 to 0
16 Kbyte
SA0
000C0800, 1h to 000DFFFC, Dh (MSB side 16 bit)
bit 31 to 16
63 Kbyte
SA1
000E0000, 1h to 000EFFFC, Dh (MSB side 16 bit)
bit 31 to 16
32 Kbyte
SA2
000F0000, 1h to 000F3FFC, Dh (MSB side 16 bit)
bit 31 to 16
8 Kbyte
SA3
000F4000, 1h to 000F7FFC, Dh (MSB side 16 bit)
bit 31 to 16
8 Kbyte
SA4
000F8000, 1h to 000FFFFC, Dh (MSB side 16 bit)
bit 31 to 16
16 Kbyte
R/W
( 0 )
R/W
( 0 )
R
( X )
( X )
( X )
( X )
R/W
( 0 )
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
RDYINT
R/W
( 0 )
INTE
WE
RDY
LPM
0007C0
H
(
)
(
)
(
)
(
)
W
( 0 )
R/W
( 0 )
R/W
( 0 )
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
(
)
FACH
WTC1
WTC0
0007C4
H
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