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參數(shù)資料
| 型號(hào)： | MB91F133PMT2 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-Bit RISC Microcontroller |
| 中文描述： | 32-BIT, FLASH, 33 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | PLASTIC, LQFP-144 |
| 文件頁(yè)數(shù)： | 108/123頁(yè) |
| 文件大小： | 1362K |
| 代理商： | MB91F133PMT2 |
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MB91133/MB91F133
108
4.
Detailed Description of Instructions
Add/subtract operation instructions (10 instructions)
Compare operation instructions (3 instructions)
Logical operation instructions (12 instructions)
Mnemonic
Type
OP
Cycle N Z V C
Operation
Remarks
ADD
* ADD
Rj, Ri
#s5, Ri
ADD
ADD2
#i4, Ri
#i4, Ri
A
C’
C
C
A6
A4
A4
A5
1
1
1
1
C C C C
C C C C
C C C C
C C C C
Ri + Rj
→
Ri
Ri + s5
→
Ri
Ri + extu (i4)
→
Ri
Ri + extu (i4)
→
Ri
MSB is interpreted as
a sign in assembly
language
Zero-extension
Sign-extension
ADDC
Rj, Ri
A
A7
1
C C C C Ri + Rj + c
→
Ri
Add operation with
sign
ADDN
* ADDN
Rj, Ri
#s5, Ri
ADDN
ADDN2
#i4, Ri
#i4, Ri
A
C’
C
C
A2
A0
A0
A1
1
1
1
1
– – – –
– – – –
– – – –
– – – –
Ri + Rj
→
Ri
Ri + s5
→
Ri
Ri + extu (i4)
→
Ri
Ri + extu (i4)
→
Ri
MSB is interpreted as
a sign in assembly
language
Zero-extension
Sign-extension
SUB
Rj, Ri
A
AC
1
C C C C Ri – Rj
→
Ri
C C C C Ri – Rj – c
→
Ri
SUBC
Rj, Ri
A
AD
1
Subtract operation with
carry
SUBN
Rj, Ri
A
AE
1
– – – – Ri – Rj
→
Ri
Mnemonic
Type
OP
Cycle N Z V C
Operation
Remarks
CMP
* CMP
Rj, Ri
#s5, Ri
CMP
CMP2
#i4, Ri
#i4, Ri
A
C’
C
C
AA
A8
A8
A9
1
1
1
1
C C C C
C C C C
C C C C
C C C C
Ri – Rj
Ri – s5
Ri + extu (i4)
Ri + extu (i4)
MSB is interpreted as
a sign in assembly
language
Zero-extension
Sign-extension
Mnemonic
Type
OP
Cycle N Z V C
Operation
Remarks
AND
AND
ANDH
ANDB
Rj, Ri
Rj, @Ri
Rj, @Ri
Rj, @Ri
A
A
A
A
82
84
85
86
1
1 + 2a
1 + 2a
1 + 2a
C C – –
C C – –
C C – –
C C – –
Ri
(Ri) & = Rj
(Ri) & = Rj
(Ri) & = Rj
& = Rj
Word
Word
Half word
Byte
OR
OR
ORH
ORB
Rj, Ri
Rj, @Ri
Rj, @Ri
Rj, @Ri
A
A
A
A
92
94
95
96
1
1 + 2a
1 + 2a
1 + 2a
C C – –
C C – –
C C – –
C C – –
Ri
(Ri) | = Rj
(Ri) | = Rj
(Ri) | = Rj
| = Rj
Word
Word
Half word
Byte
EOR
EOR
EORH
EORB
Rj, Ri
Rj, @Ri
Rj, @Ri
Rj, @Ri
A
A
A
A
9A
9C
9D
9E
1
1 + 2a
1 + 2a
1 + 2a
C C – –
C C – –
C C – –
C C – –
Ri
(Ri) ^ = Rj
(Ri) ^ = Rj
(Ri) ^ = Rj
^ = Rj
Word
Word
Half word
Byte
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