參數(shù)資料
型號: MB90246A
廠商: Fujitsu Limited
英文描述: 16-bit Proprietary Microcontroller
中文描述: 16位微控制器專有
文件頁數(shù): 32/100頁
文件大小: 1956K
代理商: MB90246A
32
MB90246A Series
2. Timebase Timer
The timebase timer is a 18-bit free-run counter (timebase counter) for counting up in synchronization to the
internal count clock (divided-by-2 of oscillation) with an interval timer function for selecting an interval time from
four types of 2
13
/HCLK, 2
15
/HCLK, 2
17
/HCLK, and 2
19
/HCLK.
The timebase timer also has a function for supplying operating clocks for the timer output for the oscillation
stabilization time or the watchdog timer etc.
(1) Register Configuration
(2) Block Diagram
Timebase timer control register (TBTC)
RESV
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
R/W
R/W
R/W
W
R/W
R/W
(WDTC)
Address
0000A9
H
TBIE
TBOF
TBR
TBC1
TBC0
: Readable and writable
R/W
: Read only
R
: Write only
: Unused
: Indeterminate
: Reserved bit
W
X
Initial value
0XX00000
B
RESV
bit 7. . . . . . . . . . . . .
. . .
. . .
To 8-bit
PWM timer
Timebase timer
counter
Divided-by-2
of HCLK
Power-on reset
Start stop mode
CKSCR : MCS = 1
0*
1
Counter
clear circuit
Interval
timer selector
Clear TBOF
Set TBOF
Timebase timer control register
(TBTC)
Timebase timer
interrupt signal
#25(19
H
)*
2
: Overflow
: Oscillation clock
: Switch machine clock from oscillation clock to PLL clock
: Interrupt signal
OF
HCLK
*1
*2
TBIE
TBR
TBOF
TBC1 TBC0
To oscillation stabilization
time selector of clock control block
To watchdog timer
OF
OF
OF
OF
×
2
1
×
2
2
×
2
3
×
2
8
×
2
9
×
2
10
×
2
11
×
2
12
×
2
13
×
2
14
×
2
15
×
2
16
×
2
17
×
2
18
RESV
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