參數(shù)資料
型號(hào)： MB90246A
廠商： Fujitsu Limited
英文描述： 16-bit Proprietary Microcontroller
中文描述： 16位微控制器專有
文件頁數(shù)： 43/100頁
文件大?。?/td> 1956K
代理商： MB90246A
43
MB90246A Series
8. UART
UART0 is a general-purpose serial data communication interface for performing synchronous or asynchronous
communication (start-stop synchronization system). In addition to the normal duplex communication function
(normal mode), UART0 has a master-slave type communication function (multi-processor mode).
Data buffer: Full-duplex double buffer
Transfer mode:Clock synchronized (with start and stop bit)
Clock asynchronized (start-stop synchronization system)
Baud rate: With dedicated baud rate generator, selectable from 12 types
External clock input possible
Internal clock (A clock supplied from 16-bit re-load timer 2 can be used.)
Data length: 7 bit to 9 bit selective (with a parity bit)
6 bit to 8 bit selective (without a parity bit)
Signal format: NRZ (Non Return to Zero) system
Reception error detection: Framing error
Overrun error
Parity error (not available in multi-processor mode)
Interrupt request: Receive interrupt (receive complete, receive error detection)
Receive interrupt (transmit complete)
Transmit/receive conforms to extended intelligent I/O service (EI
2
OS)
Master/slave type communication function: 1 (master) to n (slave) communication possible
(multi-processor mode)
(1) Register Configuration
Status register (USR)
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
Address
000029
H
Initial value
00010000
B
bit 7. . . . . . . . . . . . .
R/W
R/W
R/W
R/W
R/W
W
R/W
R/W
Address
000028
H
Initial value
00000100
B
bit 15. . . . . . . . . . . .
BCH
RC3
RC2
RC1
RC0
BCH0
P
D8
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
Address
00002B
H
Initial value
00000000
B
(UIDR/UODR)
bit 7. . . . . . . . . . . . .
Input data register (UIDR)
D7
D6
D5
D4
D3
D1
D0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Address
00002A
H
Initial value
XXXXXXXX
B
(URD)
bit 15. . . . .
bit 8
D8
Output data register (UODR)
Address
00002A
H
Initial value
XXXXXXXX
B
R/W : Readable and writable
R : Read only
W : Write only
X : Indeterminate
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
bit 15. . . . .
bit 8
PEN
SBL
MC1
MC0
SMDE
RFC
SCKE
SOE
(USR)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
D2
R
R
R
R
R
R
R
R
R
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
RDRF OREF
PE
TDRE
RIE
BCH0
RBF
TBF
(UMC)
R
R
R
R
R/W
R/W
R
R
Mode control register (UMC)
D7
D6
D5
D4
D3
D1
D0
(URD)
D8
D2
W
W
W
W
W
W
W
W
W
Rate and data register (URD)
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