參數(shù)資料
型號(hào)： MAXQ7665BATM+T
廠商： Maxim Integrated Products
文件頁數(shù)： 24/47頁
文件大小： 0K
描述： IC MCU-BASED DAS 16BIT 48-TQFN
標(biāo)準(zhǔn)包裝： 2,500
系列： MAXQ®
核心處理器： RISC
芯體尺寸： 16-位
速度： 8MHz
連通性： CAN，LIN，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 8
程序存儲(chǔ)器容量： 64KB（32K x 16）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 256 x 16
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b，D/A 1x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 48-VFQFN 裸露焊盤
包裝： 帶卷 (TR)
MAXQ7665A–MAXQ7665D
16-Bit RISC Microcontroller-Based
Smart Data-Acquisition Systems
30
_______________________________________________________________________________________
the host to the internal TAP module shift registers.
Data is transferred LSB first.
TCK—Serial clock for the test logic.
TMS—Test mode selection. Test signals received at
TMS are sampled at the rising edge of TCK and
decoded by the TAP controller to control the test
operation.
General-Purpose Digital I/Os
The MAXQ7665A–MAXQ7665D provide eight general-
purpose digital I/Os (GPIOs). All GPIOs have an addi-
tional special function (SF), such as a timer
input/output, or TAP signal for JTAG communication.
For example, the state of pin P0.6/T0 can be pro-
grammed to depend on timer channel 0 logic. When
programmed as a port, each I/O is configurable for
high-impedance or weak pullup to DVDDIO. At power-
up, each GPIO is configured as an input with pullups to
DVDDIO. Note that at power-up, the JTAG function is
enabled and should be turned off before normal opera-
tion. In addition, each GPIO can be programmed to
cause an interrupt (on falling or rising edges). In stop
mode, any interrupt can be used to wake up the device.
The data input/output direction in a port is indepen-
dently controlled by the port direction register (PD).
Each I/O within the port can be individually set as an
output or input. The port output register (PO) contains
the current state of the logic output buffers. When an
I/O is configured as an output, writing to the PO register
controls the output logic state. Reading the PO register
shows the current state of the output buffers, indepen-
dent of the data direction. The port input register (PI) is
a read-only register that always reflects the logic state
of the I/Os. When an I/O is configured as an input, writ-
ing to the PO register enables/disables the pull-up
resistor. Refer to the
MAXQ7665/MAXQ7666 User’s
Guide for more detailed information.
Port Characteristics
The MAXQ7665A–MAXQ7665D contain only one port
(P0). It is a bidirectional 8-bit I/O port, which contains
the following features:
Schmitt trigger input circuitry with software-selec-
table high-impedance or weak pullup to DVDDIO
Software-selectable push-pull CMOS output drivers
capable of sinking and sourcing 1.6mA
Software-selectable open-drain output drivers capa-
ble of sinking 1.6mA
Falling or rising edge interrupt capability
All I/Os contain an additional special function, such as
a logic input/output for a timer channel. Selecting an
I/O for a special function alters the port characteristics
of that I/O (refer to the
MAXQ7665/MAXQ7666 User’s
Guide for more details). Figure 13 illustrates the func-
tional blocks of an I/O.
MUX
FLAG
PD0._
SF DIRECTION
SF ENABLE
PO0._
SF OUTPUT
PI0._ OR
SF INPUT
EIEO._
EIES._
INTERRUPT
FLAG
DETECT
CIRCUIT
MUX
DVDDIO
I/O PAD
GNDIO
400k
PD
PO
P0._
MAXQ7665A–MAXQ7665D
Figure 13. Digital I/O Circuitry
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