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參數(shù)資料
| 型號(hào)： | MAXQ7665BATM+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 15/47頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU-BASED DAS 16BIT 48-TQFN |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | MAXQ® |
| 核心處理器： | RISC |
| 芯體尺寸： | 16-位 |
| 速度： | 8MHz |
| 連通性： | CAN，LIN，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 8 |
| 程序存儲(chǔ)器容量： | 64KB（32K x 16） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 256 x 16 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.25 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x12b，D/A 1x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 48-VFQFN 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
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MAXQ7665A–MAXQ7665D
16-Bit RISC Microcontroller-Based
Smart Data-Acquisition Systems
22
_______________________________________________________________________________________
DGND
NOMINAL
DVDD (+3.3V)
BROWNOUT
RESET
+3.06V
+2.77V
INTERNAL RESET
BOR STATE
RESET OUTPUT
DVDD BROWNOUT
INTERRUPT
THRESHOLD RANGE
VDBI[1:0] = 01
+3.13V
+2.84V
BROWNOUT
RESET
TRIGGER
POINT
BROWNOUT
INTERRUPT
TRIGGER
POINT
BROWNOUT
INTERRUPT
DVLVL FLAG
(ASR[14])
POWER-UP*
DELAY
(8.6ms)
DVBI FLAG
(ASR[4])
FLAG ARBITRARILY
CLEARED BY C
*POWER-UP DELAY IS ONLY
PRESENT WHEN DVDD DROPS
BELOW ~1.2V
VDBE BIT SET BY C
DVDD BROWNOUT
RESET THRESHOLD
RANGE VDBR[1:0] = 01
Figure 5. DVDD Brownout Interrupt Detection
During power-up, RESET is held low once DVDD rises
above +1.0V. All internal register bits are set to their
default, POR state after DVDD exceeds a threshold of
approximately +1.2V. This includes the VDBR bits
which reset to 00b, resulting in a default, DVDD
brownout reset (BOR) threshold in the +2.7V to +2.99V
range following POR. Once DVDD rises above this
DVDD brownout threshold, the 7.6MHz RC oscillator
starts driving the power-up counter, and 8.6ms (typ)
later, the RESET pin is released and allowed to go high
if nothing external is holding it low. An important sys-
tem-design consideration at power-up is the DVDD
ramp-up rate should be at least 35mV/ms between
+2.7V and +3.0V. This ensures RESET is not released
before DVDD reaches a minimum flash operating level
of +3.0V. After DVDD has reached a valid level and
RESET is released, the C jumps to the reset vector
(8000h in the utility ROM), and the desired BOI and
BOR threshold values can be set by the user through
the VIOBI, VDBI, and VDBR bits.
If a valid DVDD drops below its BOI threshold (set by
the VDBI bits), an interrupt is generated. This offers
the possibility of limited software cleanup before the
DVDD BOR occurs. The amount of cleanup time
depends on the VDBI and VDBR brownout threshold
bit settings, the size of the DVDD bypass capacitors,
and the application-dependent, C power manage-
ment and software cleanup tasks. Note that if the
internal, +3.3V linear regulator is being used to pro-
vide DVDD, additional software cleanup time is possi-
ble by using the DVDDIO brownout monitor as an early
warning that the regulator’s DVDDIO (+5V) input volt-
age is falling, and its DVDD (+3.3V) will subsequently
drop (unless DVDDIO recovers).
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參數(shù)描述 |
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| MAXQ7665C | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:16-Bit RISC Microcontroller-Based Smart Data-Acquisition Systems |
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| MAXQ7665DATM+ | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:16-Bit RISC Microcontroller-Based Smart Data-Acquisition Systems |
| MAXQ7665EVKIT# | 功能描述:開發(fā)板和工具包 - 其他處理器 Programmers, Development Systems RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
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