參數(shù)資料
型號: MAX5858AECM+D
廠商: Maxim Integrated Products
文件頁數(shù): 7/25頁
文件大?。?/td> 0K
描述: IC DAC 10BIT DUAL 300MSPS 48TQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 250
設(shè)置時間: 11ns
位數(shù): 10
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 816mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-TQFP 裸露焊盤(7x7)
包裝: 托盤
輸出數(shù)目和類型: 2 電流,單極
采樣率(每秒): 300M
MAX5858A
Dual, 10-Bit, 300Msps, DAC with 4x/2x/1x
Interpolation Filters and PLL
______________________________________________________________________________________
15
Device Power-Up and
States of Operation
At power-up, the MAX5858A is configured in no-inter-
polation mode with a gain adjustment setting of 0dB
and a fully operational converter. In shutdown, the
MAX5858A consumes only 1A of supply current, and
in standby the current consumption is 4.4mA. Wake-up
time from standby mode to normal operation is 0.7s.
Interpolation Filters
The MAX5858A features a two stage, 2x digital interpolat-
ing filter based on 43-tap and 23-tap FIR topology. F1EN
and F2EN enable the interpolation filters. F1EN = 1
enables the first filter for 2x interpolation and F2EN = 2
enables the second filter for combined 4x interpolation. To
bypass and disable both interpolation filters (no-interpola-
tion mode or 1x mode) set F1EN = F2EN = 0. When set for
1x mode the filters are powered down and consume virtu-
ally no current. An illegal condition is defined by: F1EN =
0, F2EN = 1 (see Table 2 for configuration modes).
The programmable interpolation filters multiply the
MAX5858A input data rate by a factor of two or four to
separate the reconstructed waveform spectrum and the
first image. The original spectral images, appearing
around multiples of the DAC input data rate, are attenu-
ated at least 60dB by the internal digital filters. This fea-
ture provides three benefits:
1)
Image separation reduces complexity of analog
reconstruction filters.
2)
Lower input data rates eliminate board level high-
speed data transmission.
3)
Sin(x)/x roll-off is reduced over the effective band-
width.
Figure 2 shows an application circuit and Figure 3 illus-
trates a practical example of the benefits when using
the MAX5858A with 4x-interpolation mode. The exam-
ple illustrates signal synthesis of a 20MHz IF with a
±10MHz bandwidth. Three options can be considered
to address the design requirements. The tradeoffs for
each solution are depicted in Table 4.
CONTROL WORD
FUNCTION
PD
Power-down: The part enters power-down mode if PD = 1.
DACEN
DAC Enable: When DACEN = 0 and PD = 0, the part enters standby mode.
F2EN
Filter Enable: When F2EN = 1 and F1EN = 1, 4x interpolation is enabled. When F2EN = 0, the interpolation
mode is determined by F1EN.
F1EN
Filter Enable: When F1EN = 1 and F2EN = 0, 2x interpolation is active. With F1EN = 0 and F2EN = 0, the
interpolation is disabled.
G3
Bit 3 (MSB) of gain adjust word.
G2
Bit 2 of gain adjust word.
G1
Bit 1 of gain adjust word.
G0
Bit 0 (LSB) of gain adjust word.
Table 1. Control Word Format and Function
MODE
PD
DACEN
F2EN
F1EN
No interpolation
010
0
2x interpolation
010
1
4x interpolation
011
1
Standby
00
X
Power-down
1X
X
Power-up
01
X
Table 2. Configuration Modes
GAIN ADJUSTMENT ON
CHANNEL A (dB)
G3
G2
G1
G0
+0.4
0000
0
1000
-0.35
1111
Table 3. Gain Difference Setting
X = Don’t care.
F1EN = 0, F2EN = 1: illegal condition
MSB
LSB
PD
DACEN
F2EN
F1EN
G3
G2
G1
G0
X
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