參數(shù)資料
型號(hào)： MAX5866ETM+
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 1/26頁(yè)
文件大?。?/td> 0K
描述： IC ANLG FRONT END 60MSPS 48-TQFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 43
位數(shù)： 10
通道數(shù)： 4
功率（瓦特）： 2.10W
電壓 - 電源，模擬： 2.7 V ~ 3.3 V
電壓 - 電源，數(shù)字： 2.7 V ~ 3.3 V
封裝/外殼： 48-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 48-TQFN-EP（7x7）
包裝： 管件
產(chǎn)品目錄頁(yè)面： 1398 (CN2011-ZH PDF)
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
General Description
The MAX5866 ultra-low-power, highly integrated analog
front end is ideal for portable communication equipment
such as handsets, PDAs, WLAN, and 3G wireless termi-
nals. The MAX5866 integrates dual, 8-bit receive ADCs
and dual, 10-bit transmit DACs while providing the high-
est dynamic performance at ultra-low power. The ADCs’
analog I-Q input amplifiers are fully differential and
accept 1VP-P full-scale signals. Typical I-Q channel
phase matching is ±0.2° and amplitude matching is
±0.05dB. The ADCs feature 48dB SINAD and 70.1dBc
spurious-free dynamic range (SFDR) at fIN = 25MHz and
fCLK = 60MHz. The DACs’ analog I-Q outputs are fully
differential with ±400mV full-scale output, and 1.4V com-
mon-mode level. Typical I-Q channel phase matching is
±0.4° and gain matching is ±0.1dB. The DACs also fea-
ture dual, 10-bit resolution with 64.2dBc SFDR, at fOUT =
6MHz and fCLK = 60MHz.
The ADCs and DACs operate simultaneously or indepen-
dently for frequency-division duplex (FDD) and time-divi-
sion duplex (TDD) modes. A 3-wire serial interface
controls power-down and transceiver modes of opera-
tion. The typical operating power is 96mW at fCLK =
60MHz with the ADCs and DACs operating simultane-
ously in transceiver mode. The MAX5866 features an
internal 1.024V voltage reference that is stable over the
entire operating power-supply range and temperature
range. The MAX5866 operates on a +2.7V to +3.3V ana-
log power supply and a +2.7V to +3.3V digital I/O power
supply for logic compatibility. The quiescent current is
12mA in idle mode and 1A in shutdown mode. The
MAX5866 is specified for the extended (-40°C to +85°C)
temperature range and is available in a 48-pin thin QFN
package.
Applications
Narrowband/Wideband CDMA Handsets
and PDAs
Fixed/Mobile Broadband Wireless Modems
3G Wireless Terminals
VSAT Modems
Features
Integrated Dual, 8-Bit ADCs and Dual, 10-Bit DACs
Ultra-Low Power
80mW at fCLK = 60MHz (Rx Mode)
52.5mW at fCLK = 60MHz (Tx Mode)
Low-Current Idle and Shutdown Modes
Excellent Dynamic Performance
48dB SINAD at fIN = 25MHz (ADC)
64.2dBc SFDR at fOUT = 6MHz (DAC)
Excellent Gain/Phase Match
±0.2° Phase, ±0.05dB Gain at fIN = 25MHz (ADC)
Internal/External Reference Option
+2.7V to +3.3V Digital Output Level (TTL/CMOS
Compatible)
Multiplexed Parallel Digital Input/Output for
ADCs/DACs
Miniature 48-Pin Thin QFN Package (7mm 7mm)
Evaluation Kit Available (Order MAX5865EVKIT)
MAX5866
Ultra-Low-Power, High-Dynamic-
Performance, 60Msps Analog Front End
________________________________________________________________ Maxim Integrated Products
1
ADC
IA+
IA-
QA+
QA-
ID+
ID-
QD+
QD-
REFP
COM
REFN
DIN
SCLK
CS
REFIN
DAC
ADC
OUTPUT
MUX
DAC
INPUT
MUX
CLK
DA0–DA7
DD0–DD9
MAX5866
REF
AND
BIAS
SERIAL
INTERFACE
AND SYSTEM
CONTROL
ADC
Functional Diagram
19-3223; Rev 0; 2/04
EVALUATION
KIT
AVAILABLE
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX5866ETM
-40
°C to +85°C
48 Thin QFN-EP*
(7mm x 7mm)
*EP = Exposed paddle.
Pin Configuration appears at end of data sheet.
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MAX5866ETM+ 功能描述:ADC / DAC多通道 10-Bit 2Ch 60Msps CODEC/AFE RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類(lèi)型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-40
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