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參數(shù)資料
| 型號(hào)： | MAX192BEWP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 10BIT SERIAL 20-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS），ADC |
| 分辨率（位）： | 10 b |
| 采樣率（每秒）： | 133k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 電壓電源： | 單電源 |
| 電源電壓： | ±5V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC W |
| 包裝： | 帶卷 (TR) |
Layout, Grounding, Bypassing
For best performance, use printed circuit boards.
Wire-wrap boards are not recommended. Board layout
should ensure that digital and analog signal lines are
separated from each other. Do not run analog and digi-
tal (especially clock) lines parallel to one another, or
digital lines underneath the ADC package.
Figure 18 shows the recommended system ground
connections. A single-point analog ground (“star”
ground point) should be established at AGND, sepa-
rate from the logic ground. All other analog grounds
and DGND should be connected to this ground. No
other digital system ground should be connected to
this single-point analog ground. The ground return to
the power supply for this ground should be low imped-
ance and as short as possible for noise-free operation.
High-frequency noise in the VDD power supply may
affect the high-speed comparator in the ADC. Bypass
these supplies to the single-point analog ground with
0.1F and 4.7F bypass capacitors close to the
MAX192. Minimize capacitor lead lengths for best sup-
ply-noise rejection. If the +5V power supply is very
noisy, a 10
resistor can be connected as a lowpass
filter, as shown in Figure 18.
High-Speed Digital Interfacing
The MAX192 can interface with QSPI at high through-
put rates using the circuit in Figure 19. This QSPI circuit
can be programmed to do a conversion on each of the
eight channels. The result is stored in memory without
taxing the CPU since QSPI incorporates its own
micro-sequencer.
Figure 20 details the code that sets up QSPI for
autonomous operation. In external clock mode, the
MAX192 performs a single-ended, unipolar conversion
on each of the eight analog input channels. Figure 21
shows the timing associated with the assembly code of
Figure 20. The first byte clocked into the MAX192 is the
control byte, which triggers the first conversion on CH0.
The last two bytes clocked into the MAX192 are all
zero, and clock out the results of the CH7 conversion.
MAX192
Low-Power, 8-Channel,
Serial 10-Bit ADC
______________________________________________________________________________________
19
+5V
510k
100k
24k
0.01
F
12
REFADJ
MAX192
Figure 17. Reference-Adjust Circuit
+5V
GND
SUPPLIES
DGND
+5V
DGND
AGND
VDD
DIGITAL
CIRCUITRY
MAX192
R* = 10
* OPTIONAL
Figure 18. Power-Supply Grounding Connection
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