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參數(shù)資料
| 型號(hào)： | MAX192 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Low-Power, 8-Channel,Serial 10-Bit ADC(8通道,133ksps串行10位A/D轉(zhuǎn)換器) |
| 中文描述： | 低功耗、8通道、串行10位ADC |
| 文件頁數(shù)： | 9/24頁 |
| 文件大小： | 211K |
| 代理商： | MAX192 |
M
Low-Power, 8-Channel,
S erial 10-Bit ADC
_______________________________________________________________________________________
9
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
START
SEL2
SEL1
SEL0
UNI/–—P
SGL/–—F
PD1
PD0
Bit
Name
Description
7(MSB)
START
The first logic “
1
” bit after –—goes low defines the beginning of the control byte.
6
5
4
SEL2
SEL1
SEL0
These three bits select which of the eight channels are used for the conversion.
See Tables 1 and 2.
3
UNI/–—P
1
= unipolar,
0
= bipolar. Selects unipolar or bipolar conversion mode. In unipolar
mode, an analog input signal from 0V to VREF can be converted; in differential bipolar
mode, the differential signal can range from -VREF / 2 to +VREF / 2. Select differential
operation if bipolar mode is used.
2
SGL/–—F
1
= single ended,
0
= differential. Selects single-ended or differential conversions. In
single-ended mode, input signal voltages are referred to AGND. In differential mode,
the voltage difference between two channels is measured. Select unipolar operation
if single-ended mode is used. See Tables 1 and 2.
1
0(LSB)
PD1
PD0
Selects clock and power-down modes.
PD1
PD0
0
0
0
1
1
0
1
1
Mode
Full power-down (I
Q
= 2μA)
Fast power-down (I
Q
= 30μA)
Internal clock mode
External clock mode
Table 3. Control-Byte Format
Table 2. Channel Selection in Differential Mode (SGL/
DIFF
= 0)
SEL2
SEL1
SEL0
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
0
0
0
+
–
0
0
1
+
–
0
1
0
+
–
0
1
1
+
–
1
0
0
–
+
1
0
1
–
+
1
1
0
–
+
1
1
1
–
+
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