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| 型號(hào)： | MAX192 |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Low-Power, 8-Channel,Serial 10-Bit ADC(8通道,133ksps串行10位A/D轉(zhuǎn)換器) |
| 中文描述： | 低功耗、8通道、串行10位ADC |
| 文件頁(yè)數(shù)： | 4/24頁(yè) |
| 文件大?。?/td> | 211K |
| 代理商： | MAX192 |
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Note 1:
Tested at V
DD
= 5.0V; single-ended, unipolar.
Note 2:
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3:
Grounded on-channel; sine wave applied to all off channels.
Note 4:
Conversion time defined as the number of clock cycles times the clock period; clock has 50% duty cycle.
Note 5:
Guaranteed by design. Not subject to production testing.
Note 6:
The common-mode range for the analog inputs is from AGND to V
DD
.
Note 7:
External load should not change during conversion for specified accuracy.
Note 8:
Measured at V
SUPPLY
+5% and V
SUPPLY
-5% only.
M
Low-Power, 8-Channel,
S erial 10-Bit ADC
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 5V ±5%, f
CLK
= 2.0MHz, external clock (50% duty cycle), 15 clocks/conversion cycle (133ksps), 4.7μF capacitor at VREF pin,
T
A
= T
MIN
to T
MAX,
unless otherwise noted. Typical values are at T
A
= +25°C.)
I
SINK
= 16mA
I
= 1mA
C—= 5V
–—= 5V (Note 5)
I
SINK
= 5mA
–———N= open
S———N= open
–———N= 0V
–———N= V
DD
(Note 5)
V
IN
= 0V or V
DD
CONDITIONS
V
0.3
V
OL
Output Voltage Low
0.4
nA
-100
100
–———NMax Allowed Leakage,
Mid Input
V
2.75
V
FLT
S———NVoltage, Floating
V
1.5
V
DD
- 1.5
V
IM
–———NInput Mid Voltage
μA
-4.0
I
INL
S———NInput Current, Low
μA
4.0
I
INH
S———NInput Current, High
V
0.5
V
INL
S———NInput Low Voltage
V
V
DD
- 0.5
V
INH
–———NInput High Voltage
pF
15
C
IN
DIN,SCLK, –—Input Capacitance
μA
±1
I
IN
DIN, SCLK, –—Input Leakage
V
0.15
V
HYST
DIN, SCLK, –—Input Hysteresis
V
0.8
V
INL
DIN,SCLK, –—Input Low Voltage
V
2.4
V
INH
DIN,SCLK, –—Input High Voltage
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
Output Voltage High
Three-State Leakage Current
Three-State Leakage Capacitance
POWER REQUIREMENTS
V
OH
I
L
C
OUT
4
V
±10
15
μA
pF
Positive Supply Voltage
V
DD
5 ±5%
1.5
30
2
V
Operating mode
Fast power-down
Full power-down
2.5
70
10
mA
Positive Supply Current
I
DD
μA
Positive Supply Rejection
(Note 8)
PSR
V
DD
= 5V ±5%; external reference, 4.096V;
full-scale input
±0.06
±0.5
mV
EXTERNAL REFERENCE AT REFADJ
DIGITAL INPUTS (DIN, SCLK, –C—–, –—H—D—N)
DIGITAL OUTPUTS (DOUT, SSTRB)
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