M
T rac k/Hold
The T/H enters its tracking mode on the falling clock edge
after the fifth bit of the 8-bit control word has been shifted
in. The T/H enters its hold mode on the falling clock edge
after the eighth bit of the control word has been shifted in.
If the converter is set up for single-ended inputs, IN- is
connected to AGND, and the converter samples the “+”
input. If the converter is set up for differential inputs, IN-
connects to the “-” input, and the difference of
|
IN+ - IN-
|
is sampled. At the end of the conversion, the positive
input connects back to IN+, and C
HOLD
charges to the
input signal.
The time required for the T/H to acquire an input signal is
a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens and more time must be
allowed between conversions. Acquisition time is calcu-
lated by:
t
AZ
= 9 (R
S
+ R
IN
) 16pF
where R
IN
= 5k
, R
S
= the source impedance of the input
signal, and t
AZ
is never less than 1.5μs. Note that source
impedances below 5k
do not significantly affect the AC
performance of the ADC.
Input Bandwidth
The ADC’s input tracking circuitry has a 4.5MHz
small-signal bandwidth, so it is possible to digitize
high-speed transient events and measure periodic sig-
nals with bandwidths exceeding the ADC’s sampling rate
by using undersampling techniques. To avoid high-fre-
quency signals being aliased into the frequency band of
interest, anti-alias filtering is recommended. See the data
sheets for the MAX291–MAX297 filters.
Table 1. Channel Selection in Single-Ended Mode (SGL/
DIFF
= 1)
Analog Input Range and Input Protec tion
Internal protection diodes, which clamp the analog
input to V
DD
and AGND, allow the channel input pins to
swing from AGND - 0.3V to V
DD
+ 0.3V without dam-
age. However, for accurate conversions near full scale,
the inputs must not exceed V
DD
by more than 50mV, or
be lower than AGND by 50mV.
If an off-channel analog input exceeds the supplies
by more than 50mV, current will flow through the
protection diodes on that input. If this current
exceeds 2mA, the accuracy of the on-channel’s con-
version will be degraded.
The MAX192 can be configured for differential (unipolar
or bipolar) or single-ended (unipolar only) inputs, as
selected by bits 2 and 3 of the control byte (Table 3).
In the single-ended mode, set the UNI/BIP bit to unipo-
lar. In this mode, analog inputs are internally referenced
to AGND, with a full-scale input range from 0V to V
REF
.
In differential mode, both unipolar and bipolar settings
can be used. Choosing unipolar mode sets the differ-
ential input range at 0V to V
REF
. The output code is
invalid (code zero) when a negative differential input
voltage is applied. Bipolar mode sets the differential
input range to ±V
REF
/ 2. Note that in this differential
mode, the common-mode input range includes both
supply rails. Refer to Tables 4a and 4b for input volt-
age ranges.
Quic k Look
To evaluate the analog performance of the MAX192
quickly, use Figure 5’s circuit. The MAX192 requires a
control byte to be written to DIN before each
Low-Power, 8-Channel,
S erial 10-Bit ADC
8
_______________________________________________________________________________________
SEL2
SEL1
SEL0
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
AGND
0
0
0
+
–
1
0
0
+
–
0
0
1
+
–
1
0
1
+
–
0
1
0
+
–
1
1
0
+
–
0
1
1
+
–
1
1
1
+
–