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參數(shù)資料
| 型號(hào)： | MAX1889ETE |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Triple-Output TFT LCD Power Supply with Fault Protection |
| 中文描述： | 2.8 A SWITCHING REGULATOR, 1250 kHz SWITCHING FREQ-MAX, QCC16 |
| 封裝： | 5 X 5 MM, 0.80 MM HEIGHT, ULTRA THIN, QFN-16 |
| 文件頁數(shù)： | 16/32頁 |
| 文件大?。?/td> | 796K |
| 代理商： | MAX1889ETE |
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M
Triple-Output TFT LCD Power Supply
with Fault Protection
16
______________________________________________________________________________________
Power-Up Sequencing and
Inrush Current Control
Once
SHDN
is high, the MAX1889 enables the UVLO
circuitry and compares the input voltage with the UVLO
rising threshold (2.7V, typ). If the input voltage exceeds
the UVLO rising threshold, the reference is enabled.
When the reference voltage ramps up above 1.05V
(typ), the MAX1889 enables the oscillator and turns on
the external P-channel MOSFET P1 (Figure 1) by
pulling GATE low. GATE is pulled down with a 12μA
current source. Add a capacitor from the gate of P1 to
its drain to slow down the turn-on rate of the MOSFET,
and reduce inrush current. Once GATE reaches around
0.6V, an internal N-channel MOSFET turns on and pulls
GATE to ground in order to maximize the enhancement
of the external P-channel MOSFET. As P1 fully turns on,
the main step-up regulator powers up with soft-start
(see the
Soft-Start
section). The negative linear regula-
tor is enabled at the same time as the main step-up
regulator. The positive linear regulator is enabled after
the soft-start routine is completed. The fault detection
timer begins after the main step-up regulator has fin-
ished its soft-start period.
Soft-Start
The soft-start of the main step-up regulator (Figure 3) is
achieved by ramping up the reference voltage of the
multi-input PWM comparator in 4096 oscillator clock
cycles. The 4096 clock cycles correspond to 4.096ms
for 1MHz operation and 8.192ms for 500kHz operation.
The reference of the PWM comparator comes from a
5-bit DAC that generates 32 steps when the reference
ramps up from 0V to its final value. This soft-start
method allows a gradual increase of the output voltage
to reduce the input surge current (see the startup
waveforms in the
Typical Operating Characteristics
).
The average input current is given as:
where V
MAIN
is the main step-up regulator output volt-
age, V
IN
is the input voltage, C
OUT
is the main step-up
regulator output capacitor,
η
is the efficiency of the
step-up regulator, and t
SS
is the soft-start period
(4.096ms for 1MHz operation and 8.192ms for 500kHz
operation).
Input Overcurrent Protection
The high-side overcurrent comparator of the MAX1889
provides input overcurrent protection when it is used
together with the external P-channel MOSFET switch P1
(Figure 1). Connect resistive voltage-dividers from the
source and drain of P1 to GND to set the overcurrent
threshold. The center taps of the dividers are connected
to the overcurrent comparator inputs (OCN and OCP)
See the
Setting the Input Overcurrent Threshold
section
for information on calculating resistor values. An overcur-
rent event activates the fault-protection circuitry.
Fault Protection
Once the soft-start routine is completed, if the output of
the main regulator or either linear regulator is below its
respective fault-detection threshold, or the input overcur-
rent comparator pulls high, the MAX1889 activates the
fault timer. If the fault condition still exists after the 64ms
fault-timer duration, the MAX1889 sets the fault latch,
which shuts down all the outputs except the reference,
which remains active. After removing the fault condition,
toggle
SHDN
(below 0.4V) or cycle the input voltage
(below 2.2V) to clear the fault latch and reactivate the
device.
Thermal Shutdown
The thermal shutdown feature limits total power dissipa-
tion in the MAX1889. When the junction temperature
(T
J
) exceeds +160
°
C, a thermal sensor sets the fault
latch (Figure 2), which shuts down all the outputs
except the reference, allowing the device to cool down.
Once the device cools down by 15
°
C, toggle
SHDN
(below 0.4V) or cycle the input voltage (below 2.2V) to
clear the fault latch and reactivate the device.
Design Procedure
Main Step-Up Regulator
Output Voltage Selection
Adjust the output voltage by connecting a resistive volt-
age-divider from the output (V
MAIN
) to GND with the
center tap connected to FB (Figure 1). Select R7 in the
10k
to 50k
range. Calculate R6 with the following
equations:
R
R
V
MAIN
6
7
(
where
For example, at V
IN
= 3V, V
MAIN
= 9V, D
≈
0.66, and V
FB
= 1.229V.
V
MAIN
can range from V
IN
to 13V.
V
FB
1
=
[
]
/
)-
I
V
C
V
t
IN AVG
_
MAIN
OUT
×
η
IN
SS
=
×
×
2
V
V
D
(
mV and D
20
)
V
V
V
FB
MAIN
IN
MAIN
=
×
≈
1 242
.
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