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參數資料
| 型號： | MAX1303BEUP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數： | 19/29頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT MULT RANGE 20TSSOP |
| 標準包裝： | 2,500 |
| 位數： | 16 |
| 采樣率（每秒）： | 115k |
| 數據接口： | 串行 |
| 轉換器數目： | 1 |
| 功率耗散（最大）： | 105.5mW |
| 電壓電源： | 模擬和數字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數目和類型： | 4 個單端，單極；4 個單端，雙極；2 個差分，雙極 |
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MAX1303
4-Channel, ±VREF Multirange Inputs,
Serial 16-Bit ADC
26
______________________________________________________________________________________
Bridge Application
The MAX1303 converts 1kHz signals more accurately
than a similar sigma-delta converter that might be consid-
ered in bridge applications. Connect the bridge to a low-
offset differential amplifier and then the true differential
inputs of the MAX1303. Larger excitation voltages take
advantage of more of the ±VREF/2 differential input volt-
age range. Select an input voltage range that matches
the amplifier output. Be aware of the amplifier offset and
offset-drift errors when selecting an appropriate amplifier.
Dynamically Adjusting the Input Range
Software control of each channel’s analog input range
and the unipolar endpoint overlap specification make it
possible for the user to change the input range for a
channel dynamically and improve performance in some
applications. Changing the input range results in a
small LSB step-size over a wider output voltage range.
For example, by switching between a -VREF/2 to 0V
range and a 0V to VREF/2 range, an LSB is:
but the input voltage range effectively spans from
-VREF/2 to +VREF/2 (FSR = +VREF).
Layout, Grounding, and Bypassing
Careful PCB layout is essential for best system perfor-
mance. Boards should have separate analog and digital
ground planes and ensure that digital and analog sig-
nals are separated from each other. Do not run analog
and digital (especially clock) lines parallel to one anoth-
er, or digital lines underneath the device package.
Figure 1 shows the recommended system ground connec-
tions. Establish an analog ground point at AGND1 and a
digital ground point at DGND. Connect all analog grounds
to the star analog ground. Connect the digital grounds to
the star digital ground. Connect the digital ground plane to
the analog ground plane at one point. For lowest noise
operation, make the ground return to the star ground’s
power-supply low impedance and as short as possible.
High-frequency noise in the AVDD1 power supply
degrades the ADC’s high-speed comparator perfor-
mance. Bypass AVDD1 to AGND1 with a 0.1F ceramic
surface-mount capacitor. Make bypass capacitor con-
nections as short as possible.
Parameter Definitions
Integral Nonlinearity (INL)
INL is the deviation of the values on an actual transfer
function from a straight line. This straight line is either a
best straight-line fit or a line drawn between the end-
points of the transfer function once offset and gain
errors have been nullified. The MAX1303 INL is mea-
sured using the endpoint method.
Differential Nonlinearity (DNL)
DNL is the difference between an actual step width and
the ideal value of 1 LSB. A DNL error specification of
greater than -1 LSB guarantees no missing codes and
a monotonic transfer function.
Transition Noise
Transition noise is the amount of noise that appears at a
code transition on the ADC transfer function. Conversions
performed with the analog input right at the code transi-
tion can result in code flickering in the LSBs.
Channel-to-Channel Isolation
Channel-to-channel isolation indicates how well each
analog input is isolated from the others. The channel-to-
channel isolation for these devices is measured by
applying a near full-scale magnitude 5kHz sine wave to
the selected analog input channel while applying an
equal magnitude sine wave of a different frequency to
all unselected channels. An FFT of the selected chan-
nel output is used to determine the ratio of the magni-
tudes of the signal applied to the unselected channels
and the 5kHz signal applied to the selected analog
input channel. This ratio is reported, in dB, as channel-
to-channel isolation.
Unipolar Offset Error
-FSR to 0V
When a zero-scale analog input voltage is applied to
the converter inputs, the digital output is all ones
(0xFFFF). Ideally, the transition from 0xFFFF to 0xFFFE
occurs at AGND1 - 0.5 LSB. Unipolar offset error is the
amount of deviation between the measured zero-scale
transition point and the ideal zero-scale transition point,
with all untested channels grounded.
0V to +FSR
When a zero-scale analog input voltage is applied to
the converter inputs, the digital output is all zeros
(0x0000). Ideally, the transition from 0x0000 to 0x0001
occurs at AGND1 + 0.5 LSB. Unipolar offset error is the
amount of deviation between the measured zero-scale
transition point and the ideal zero-scale transition point,
with all untested channels grounded.
Bipolar Offset Error
When a zero-scale analog input voltage is applied to
the converter inputs, the digital output is a one followed
by all zeros (0x8000). Ideally, the transition from
0x7FFF to 0x8000 occurs at (2N-1 - 0.5) LSB. Bipolar off-
set error is the amount of deviation between the mea-
sured midscale transition point and the ideal midscale
transition point, with untested channels grounded.
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REF
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