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參數(shù)資料
| 型號(hào)： | MAX1303BEUP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 14/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT MULT RANGE 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 115k |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 105.5mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個(gè)單端，單極；4 個(gè)單端，雙極；2 個(gè)差分，雙極 |
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MAX1303
4-Channel, ±VREF Multirange Inputs,
Serial 16-Bit ADC
______________________________________________________________________________________
21
Serial Strobe Output (SSTRB)
As shown in Figures 2 and 3, the SSTRB transitions high
to indicate that the ADC has completed a conversion
and results are ready to be read by the master. SSTRB
remains low in the external clock mode (Figure 1) and
consequently may be left unconnected. SSTRB is dri-
ven high or low regardless of the state of CS, therefore
SSTRB cannot be shared with other peripherals.
Start Bit
Communication with the MAX1303 is accomplished
using the three input data word formats shown in
Table 3. Each input data word begins with a start bit.
The start bit is defined as the first high bit clocked into
DIN with CS low when any of the following are true:
Data conversion is not in process and all data from
the previous conversion has clocked out of DOUT.
The device is configured for operation in external
clock mode (mode 0) and previous conversion-result
bits B15–B3 have clocked out of DOUT.
The device is configured for operation in external
acquisition mode (mode 1) and previous conversion-
result bits B15–B7 have clocked out of DOUT.
The device is configured for operation in internal
clock mode, (mode 2) and previous conversion-
result bits B15–B4 have clocked out of DOUT.
Output Data Format
Output data is clocked out of DOUT in offset binary for-
mat on the falling edge of SCLK, MSB first (B15). For
output binary codes, see the
Transfer Function section
and Figures 11, 12, and 13.
Configuring Analog Inputs
Each analog input has two configurable parameters:
Single-ended or true-differential input
Input voltage range
These parameters are configured using the analog input
configuration byte as shown in Table 2. Each analog
input has a dedicated register to store its input configura-
tion information. The timing diagram of Figure 14 shows
how to write to the analog input configuration registers.
Figure 15 shows DOUT and SSTRB timing.
Transfer Function
An ADC’s transfer function defines the relationship
between the analog input voltage and the digital output
code. Figures 11, 12, and 13 show the MAX1303 transfer
functions. The transfer function is determined by the fol-
lowing characteristics:
Analog input voltage range
Single-ended or differential configuration
Reference voltage
The axes of an ADC transfer function are typically in least
significant bits (LSBs). For the MAX1303, an LSB is calcu-
lated using the following equation:
where N is the number of bits (N = 16) and FSR is the
full-scale range (see Figures 6 and 7).
1
2
4 096
.
LSB
FSR
V
REF
N
=
×
1 LSB =
FSR x VREF
65,536 x 4.096V
BINARY
OUTPUT
CODE
(LSB
[hex])
FFFF
FFFE
FFFD
8001
8000
7FFF
0003
0002
0001
0000
FSR
-32,768 -32,766
0
+32,765 +32,767
INPUT VOLTAGE (LSB [DECIMAL])
AGND1 (DIF/SGL = 0)
0V (DIF/SGL = 1)
FSR
-1
+1
Figure 11. Ideal Bipolar Transfer Function, Single-Ended or
Differential Input
1 LSB =
FSR x VREF
65,536 x 4.096V
BINARY
OUTPUT
CODE
(LSB
[hex])
FFFF
FFFE
FFFD
8001
8000
7FFF
0003
0002
0001
0000
FSR
0
1
2
3
32,768
65,533 65,535
INPUT VOLTAGE (LSB [DECIMAL])
(AGND1)
FSR
Figure 12. Ideal Unipolar Transfer Function, Single-Ended
Input, -FSR to 0
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