參數(shù)資料
型號: MAX1162EVKIT
廠商: Maxim Integrated Products
文件頁數(shù): 14/18頁
文件大小: 0K
描述: EVAL KIT FOR MAX1162
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 1
位數(shù): 16
采樣率(每秒): 200k
數(shù)據(jù)接口: 串行
輸入范圍: 0 ~ VREF
在以下條件下的電源(標(biāo)準(zhǔn)): 12.5mW @ 200kSPS
工作溫度: 0°C ~ 70°C
已用 IC / 零件: MAX1162,MAX1062
已供物品: 板,CD
MAX1162
16-Bit, +5V, 200ksps ADC with 10A
Shutdown
_______________________________________________________________________________________
5
Note 1: AVDD = DVDD = +5V.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3: Offset and reference errors nulled.
Note 4: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 5: Defined as the change in positive full scale caused by a ±5% variation in the nominal supply voltage.
TIMING CHARACTERISTICS (Figures 1, 2, 3, and 6)
(AVDD = +4.75V to +5.25V, DVDD = +2.7V to +5.25V, fSCLK = 4.8MHz (50% duty cycle), 24 clocks/conversion (200ksps), VREF =
+4.096V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Acquisition Time
tACQ
1.1
s
SCLK to DOUT Valid
tDO
CDOUT = 50pF
100
ns
CS Fall to DOUT Enable
tDV
CDOUT = 50pF
100
ns
CS Rise to DOUT Disable
tTR
CDOUT = 50pF
80
ns
CS Pulse Width
tCSW
50
ns
CS Fall to SCLK Rise Setup
tCSS
100
ns
CS Rise to SCLK Rise Hold
tCSH
0ns
SCLK High Pulse Width
tCH
65
ns
SCLK Low Pulse Width
tCL
65
ns
SCLK Period
tCP
208
ns
INL vs. OUTPUT CODE
MAX1162
toc01
OUTPUT CODE
INL
(LSB)
52429
39322
13107
26214
-1.5
-1.0
-0.5
0
0.5
1.0
1.5
2.0
-2.0
0
65536
DNL vs. OUTPUT CODE
MAX1162
toc02
OUTPUT CODE
DNL
(LSB)
52429
39322
26214
13107
-1.5
-1.0
-0.5
0
0.5
1.0
1.5
2.0
-2.0
0
65536
90
80
70
60
50
40
30
20
10
-120
-100
-80
-60
-40
-20
0
-140
0
100
MAX1162 FFT
MAX1162
toc03
FREQUENCY (kHz)
MAGNITUDE
(dB)
Typical Operating Characteristics
(AVDD = DVDD = +5V, fSCLK = 4.8MHz, CLOAD = 50pF, CREF = 4.7F, VREF = +4.096V, TA = +25°C, unless otherwise noted.)
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