
14-48
Extension Registers
`efmp69030 Databook
Revision 1.3 11/24/99
XRC8
Dot Clock 2 VCO M-Divisor Register
read/write at I/O address 3D7h with index at I/O address 3D6h set to C8h
shadowed for pipelines A and B
Note: All four of the registers used in specifying the loop parameters for dot clock 2 (XRC8 - XRCB) must
be written, and in order from XRC8 to XRCB, before the hardware will update the synthesizer’s settings.
This is a form of double-buffering that is intended to prevent fluctuations in the synthesizer’s output as new
values are being written to these registers.
7-0
Dot Clock 2 VCO M-Divisor
This register provides the M-divisor, one of the loop parameters used in controlling the
frequency of the output of the synthesizer used to generate dot clock 2.
A series of calculations are used to derive this value and the values for the other loop
parameters given a desired output frequency and a series of constraints placed on different
components within the synthesizer used to generate dot clock 2. See appendix B for a
detailed description of the process used to derive the loop parameter values.
XRC9
Dot Clock 2 VCO N-Divisor Register
read/write at I/O address 3D7h with index at I/O address 3D6h set to C9h
shadowed for pipelines A and B
Note: All four of the registers used in specifying the loop parameters for dot clock 2 (XRC8 - XRCB) must
be written, and in order from XRC8 to XRCB, before the hardware will update the synthesizer’s settings.
This is a form of double-buffering that is intended to prevent fluctuations in the synthesizer’s output as new
values are being written to these registers.
7-0
Dot Clock 2 VCO N-Divisor Bits 7-0
This register provides the N-divisor, one of the loop parameters used in controlling the
frequency of the output of the synthesizer used to generate dot clock 2.
A series of calculations are used to derive this value and the values for the other loop
parameters given a desired output frequency and a series of constraints placed on different
components within the synthesizer used to generate dot clock 2. See appendix B for a
detailed description of the process used to derive the loop parameter values.
76543
210
A
Dot Clock 2 VCO M-Divisor
B
Dot Clock 2 VCO M-Divisor
76543
210
A
Dot Clock 2 VCO N-Divisor
B
Dot Clock 2 VCO N-Divisor