
43
3803/3804 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
(4) Pulse period measurement mode
G
Mode selection
This mode can be selected by setting
“
010
”
to the timer Z operat-
ing mode bits (bits 2 to 0) and setting
“
0
”
to the timer/event
counter mode switch bit (b7) of the timer Z mode register (address
002A
16
).
G
Count source selection
In high- or middle-speed mode, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64,
1/128, 1/256, 1/512 or 1/1024 of f(X
IN
); or f(X
CIN
) can be selected
as the count source.
In low-speed mode, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256,
1/512 or 1/1024 of f(X
CIN
); or f(X
CIN
) can be selected as the count
source.
G
Interrupt
The interrupt at an underflow is the same as the timer mode
’
s.
When the pulse period measurement is completed, the INT
4
/
CNTR
2
interrupt request bit (bit 5) of the interrupt request register
2 (address 003D
16
) is set to
“
1
”
.
G
Explanation of operation
[During timer operation stop]
Select the count source. Next, select the term of the pulse period
to be measured. When the CNTR
2
active edge switch bit (bit 5) of
the timer Z mode register (address 002A
16
) is
“
0
”
, the timer counts
during the term of one falling edge of CNTR
2
pin input until the
next falling edge of input. When it is
“
1
”
, the timer counts during
the term of one rising edge input until the next rising edge input.
[During timer operation enabled]
The pulse period measurement starts by setting
“
0
”
to the timer Z
count stop bit (bit 6) of the timer Z mode register (address
002A
16
), and the timer counts down from the value that was set to
the timer before the start of measurement.
When the valid edge of measurement completion/start is detected,
the 1
’
s complement of the timer value is written to the timer latch
and
“
FFFF
16
”
is set to the timer.
Furthermore when the timer underflows, the timer Z interrupt re-
quest occurs and
“
FFFF
16
”
is set to the timer. The measured value
is retained until the next measurement completion.
I
Precautions
Set the double-function port of CNTR
2
pin and port P4
7
to input in
this mode.
A read-out of timer value is impossible in this mode. The timer can
be written to only during timer stop (no measurement of pulse pe-
riod).
Since the timer latch in this mode is specialized for the read-out of
measured values, do not perform any write operation during mea-
surement.
“
FFFF
16
”
is set to the timer when the timer underflows or when the
valid edge of measurement start/completion is detected. Conse-
quently, the timer value at start of pulse period measurement
depends on the timer value just before measurement start.
Figure 36 shows the timing chart of the pulse period measurement
mode.
(5) Pulse width measurement mode
G
Mode selection
This mode can be selected by setting
“
011
”
to the timer Z operat-
ing mode bits (bits 2 to 0) and setting
“
0
”
to the timer/event
counter mode switch bit (b7) of the timer Z mode register (address
002A
16
).
G
Count source selection
In high- or middle-speed mode, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64,
1/128, 1/256, 1/512 or 1/1024 of f(X
IN
); or f(X
CIN
) can be selected
as the count source.
In low-speed mode, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256,
1/512 or 1/1024 of f(X
CIN
); or f(X
CIN
) can be selected as the count
source.
G
Interrupt
The interrupt at an underflow is the same as the timer mode
’
s.
When the pulse widths measurement is completed, the INT
4
/
CNTR
2
interrupt request bit (bit 5) of the interrupt request register
2 (address 003D
16
) is set to
“
1
”
.
G
Explanation of operation
[During timer operation stop]
Select the count source. Next, select the term of the pulse width to
be measured. When the CNTR
2
active edge switch bit (bit 5) of
the timer Z mode register (address 002A
16
) is
“
1
”
, the timer counts
during the term of one falling edge of CNTR
2
pin input until the
next rising edge of input (
“
L
”
term). When it is
“
0
”
, the timer counts
during the term of one rising edge input until the next falling edge
input (
“
H
”
term).
[During timer operation enabled]
The pulse width measurement starts by setting
“
0
”
to the timer Z
count stop bit (bit 6) of the timer Z mode register (address
002A
16
), and the timer counts down from the value that was set to
the timer before the start of measurement.
When the valid edge of measurement completion is detected, the
1
’
s complement of the timer value is written to the timer latch.
When the valid edge of measurement start/completion is detected,
“
FFFF
16
”
is set to the timer.
Furthermore when the timer underflows, the timer Z interrupt re-
quest occurs and
“
FFFF
16
”
is set to the timer. The measured value
is retained until the next measurement completion.
I
Precautions
Set the double-function port of CNTR
2
pin and port P4
7
to input in
this mode.
A read-out of timer value is impossible in this mode. The timer can
be written to only during timer stop (no measurement of pulse
widths).
Since the timer latch in this mode is specialized for the read-out of
measured values, do not perform any write operation during mea-
surement.
“
FFFF
16
”
is set to the timer when the timer underflows or when the
valid edge of measurement start/completion is detected. Conse-
quently, the timer value at start of pulse width measurement
depends on the timer value just before measurement start.
Figure 37 shows the timing chart of the pulse width measurement
mode.