參數(shù)資料
型號: M37531RSS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 8 MHz, MICROCONTROLLER, CDIP42
封裝: SHRINK, CERAMIC, PIGGY BACK, DIP-42
文件頁數(shù): 9/76頁
文件大小: 1022K
代理商: M37531RSS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7531 Group
MITSUBISHI MICROCOMPUTERS
17
Interrupt disable flag I
Interrupt request
Interrupt request bit
Interrupt enable bit
BRK instruction
Reset
Fig. 17 Interrupt control
Fig. 18 Structure of Interrupt-related registers
b7
b0
b7
b0
Interrupt edge selection register
INT0 interrupt edge selection bit
0 : Falling edge active
1 : Rising edge active
INT1 interrupt edge selection bit
0 : Falling edge active
1 : Rising edge active
Not used (returns “0” when read)
Serial I/O1 or INT1 interrupt source selection bit
(Do not write “1” for 32 pin version)
0 : Serial I/O1
1 : INT1
Timer X or key-on wake up interrupt selection bit
0 : Timer X
1 : Key-on wake up
Timer 2 or serial I/O2 interrupt selection bit
0 : Timer 2
1 : Serial I/O2
CNTR0 or AD converter interrupt source selection bit
0 : CNTR0
1 : AD converter
(INTEDGE : address 003A16, initial value: 0016)
Interrupt request register 1
Serial I/O1 receive interrupt request bit
Serial I/O1 transmit or INT1 interrupt request bit
INT0 interrupt request bit
Timer X or key-on wake up interrupt request bit
Timer 1 interrupt request bit
Timer 2 or serial I/O2 interrupt request bit
CNTR0 or AD converter interrupt request bit
Not used (returns “0” when read)
0 : No interrupt request issued
1 : Interrupt request issued
(IREQ1 : address 003C16, initial value: 0016)
b7
b0 Interrupt control register 1
Serial I/O1 receive interrupt enable bit
Serial I/O1 transmit or INT1 interrupt enable bit
INT0 interrupt enable bit
Timer X or key-on wake up interrupt enable bit
Timer 1 interrupt enable bit
Timer 2 or serial I/O2 interrupt enable bit
CNTR0 or AD converter interrupt enable bit
Not used (returns “0” when read)
(Do not write “1” to this bit)
0 : Interrupts disabled
1 : Interrupts enabled
(ICON1 : address 003E16, initial value: 0016)
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