參數(shù)資料
型號： M37531RSS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 8 MHz, MICROCONTROLLER, CDIP42
封裝： SHRINK, CERAMIC, PIGGY BACK, DIP-42
文件頁數(shù)： 20/76頁
文件大?。?/td> 1022K
代理商： M37531RSS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7531 Group
MITSUBISHI MICROCOMPUTERS
27
Watchdog Timer
The watchdog timer gives a means for returning to a reset status
when the program fails to run on its normal loop due to a runaway.
The watchdog timer consists of an 8-bit watchdog timer H and an 8-
bit watchdog timer L, being a 16-bit counter.
Standard operation of watchdog timer
The watchdog timer stops when the watchdog timer control register
(address 003916) is not set after reset. Writing an optional value to
the watchdog timer control register (address 003916) causes the
watchdog timer to start to count down. When the watchdog timer H
underflows, an internal reset occurs. Accordingly, it is programmed
that the watchdog timer control register (address 003916) can be set
before an underflow occurs.
When the watchdog timer control register (address 003916) is read,
the values of the high-order 6-bit of the watchdog timer H, STP in-
struction disable bit and watchdog timer H count source selection bit
are read.
Initial value of watchdog timer
By a reset or writing to the watchdog timer control register (address
003916), the watchdog timer H is set to “FF16” and the watchdog
timer L is set to “FF16”.
Operation of watchdog timer H count source selection bit
A watchdog timer H count source can be selected by bit 7 of the
watchdog timer control register (address 003916). When this bit is
“0”, the count source becomes a watchdog timer L underflow signal.
The detection time is 131.072 ms at f(XIN)=8 MHz.
When this bit is “1”, the count source becomes f(XIN)/16. In this
case, the detection time is 512 s at f(XIN)=8 MHz.
This bit is cleared to “0” after reset.
Operation of STP instruction disable bit
When the watchdog timer is in operation, the STP instruction can be
disabled by bit 6 of the watchdog timer control register (address
003916).
When this bit is “0”, the STP instruction is enabled.
When this bit is “1”, the STP instruction is disabled, and an internal
reset occurs if the STP instruction is executed.
Once this bit is set to “1”, it cannot be changed to “0” by program.
This bit is cleared to “0” after reset.
XIN
Data bus
“0”
“1”
1/16
Watchdog timer H count
source selection bit
Reset
circuit
STP Instruction Disable Bit
Watchdog timer H (8)
Write "FF16" to the
watchdog timer
control register
Internal reset
RESET
Watchdog timer L (8)
STP Instruction
Write “FF16” to the
watchdog timer
control register
Fig. 33 Block diagram of watchdog timer
Fig. 34 Structure of watchdog timer control register
Watchdog timer control register
(WDTCON: address 003916, initial value: 3F16)
Watchdog timer H (read only for high-order 6-bit)
STP instruction disable bit
0 : STP instruction enabled
1 : STP instruction disabled
Watchdog timer H count source selection bit
0 : Watchdog timer L underflow
1 : f(XIN)/16
b7
b0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M37531T-ADS 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Temporary Target Board
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M37532M4-A17GP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M37532M4-XXXFP 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
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