參數(shù)資料
型號(hào)： M37517F8HP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP48
封裝： 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁(yè)數(shù)： 67/98頁(yè)
文件大小： 886K
代理商： M37517F8HP
Rev.1.01
Aug 02, 2004
page 7 of 96
7517 Group
Pin
Name
Input/Output
I/O Structure
Non-Port Function
Ref.No.
Table 2 I/O port function
Related SFRs
I/O PORTS
The I/O ports have direction registers which determine the input/
output direction of each individual pin. Each bit in a direction reg-
ister corresponds to one pin, and each pin can be set to be input
port or output port.
When “0” is written to the bit corresponding to a pin, that pin be-
comes an input pin. When “1” is written to that bit, that pin
becomes an output pin.
Port P0
Port P1
Port P3
Input/output,
individual
bits
CMOS compatible
input level
CMOS 3-state output
Sub-clock generating
circuit
CPU mode register
MISRG2
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
Port P2
Port P4
CMOS compatible
input level
CMOS/SMBUS input
level (when selecting
I2C-BUS interface
function)
N-channel open-drain
output
CMOS compatible
input level
CMOS/SMBUS input
level (when selecting
I2C-BUS interface
function)
CMOS 3-state output
N-channel open-drain
output (when
selecting I2C-BUS
interface function)
CMOS compatible
input level
CMOS 3-state output
I2C-BUS interface func-
tion I/O
I2C-BUS interface func-
tion I/O
Serial I/O1 function I/O
I2C control register
Serial I/O1 control
register
Serial I/O1 control
register
Serial I/O1 control
register
Timer XY mode register
A/D control register
MISRG2
Timer XY mode register
Interrupt edge selection
register
Interrupt edge selection
register
Serial I/O2 control
register
Interrupt edge selection
register
PWM control register
External interrupt input
PWM output
P00/SIN2
P01/SOUT2
P02/SCLK2
P03/SRDY2
P04/AN8–P07/AN11
P10–P17
P20/XCOUT
P21/XCIN
P22/SDA1
P23/SCL1
Serial I/O2 control
register
Serial I/O2 function I/O
P24/SDA2/RxD
P25/SCL2/TxD
P26/SCLK
P27/CNTR0/
SRDY1
Serial I/O1 function I/O
Timer X function I/O
A/D conversion input
Timer Y function I/O
External interrupt input
P30/AN0–
P35/AN5
P40/CNTR1
P41/INT0
P42/INT1
P43/INT2/SCMP2
External interrupt input
SCMP2 output
P44/INT3/PWM
P45/DFETCNT
(5)
(15)
(16)
(17)
(18)
(19)
A/D conversion input
A/D control register, MISRG2
(13)
(14)
If data is read from a pin which is set to output, the value of the
port output latch is read, not the value of the pin itself. Pins set to
input are floating. If a pin set to input is written to, only the port
output latch is written to and the pin remains floating.
Short current detect
control register
Over current detect
control register
Wake up current detect
control register
Over current detector
output
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