參數(shù)資料
型號(hào)： M37517F8HP
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP48
封裝： 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁(yè)數(shù)： 35/98頁(yè)
文件大小： 886K
代理商： M37517F8HP
Rev.1.01
Aug 02, 2004
page 40 of 96
7517 Group
Fig. 46 Calibration timing
Calibration mode
Setting the current integrate mode bit “1”, the input of level shift
circuit is connected to internal AVSS or 0.1V for reference voltage.
When the calibration selection bit is “00”, both of plus and GND in-
put of level shift circuit are connected to internal AVSS, and zero
calibration is operated. When the calibration selection bit is “01”,
plus input of level shift circuit is connected to internal 0.1V refer-
ence voltage, and GND input of level shift circuit is connected to
internal AVSS, and then full calibration for discharge state is op-
erated. When the calibration selection bit is “10”, plus input of
level shift circuit is connected to internal AVSS, and GND input of
level shift circuit is connected to 0.1V reference voltage, and the
full calibration for charge state is operated. The calibration pe-
riod can be selected by calibration period selection bit among
15.625 ms, 31.25 ms, 62.5 ms, 125.0 ms. The calibration starts
at beginning of next integrate period, after setting the current in-
tegrate mode bit “1”.
012
3
Integrate period 125 ms
Calibration
15.625 ms -125 ms
VINF input
Current integrate
mode bit
Counter latch content flag
Level shift circuit
out put
Integrator output
Discharge comparator
Discharge counter
Discharge counter latch
AD conversion mode bit
Discharge comparator
Discharge signal
for integrator
AD conversion
completion bit
Integrator output
Set calibration complete
flag to “1”.
Integrate period 125 ms
Current integrate mode
Integrate period 125ms
Calibration
15.625 ms -125 ms
Integrate period 125ms
AD conversion execute
Count value of last
integrate period
3 (Calibration result)
Count value of last integrate period *
* Except calibration period
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參數(shù)描述
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