參數(shù)資料
型號(hào): M37517F8HP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù): 4/98頁
文件大小: 886K
代理商: M37517F8HP
Rev.1.01
Aug 02, 2004
page 12 of 96
7517 Group
Interrupt Request
Generating Conditions
Remarks
Interrupt Source
Low
FFFC16
High
FFFD16
Priority
1
Table 3 Interrupt vector addresses and priority
Vector Addresses (Note 1)
Reset (Note 2)
INT0
SCL, SDA
INT1
INT2
INT3
Serial I/O2
At reset
At detection of either rising or
falling edge of INT0 input
At detection of either rising or
falling edge of INT1 input
At detection of either rising or
falling edge of INT2 input
Non-maskable
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
At detection of either rising or
falling edge of SCL or SDA input
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
FFFA16
FFF816
FFF616
FFF416
FFF216
FFFB16
FFF916
FFF716
FFF516
FFF316
2
3
4
5
6
FFF016
FFF116
7
Notes 1: Vector addresses contain interrupt jump destination addresses.
2: Reset function in the same way as an interrupt with the highest priority.
I2C
Timer X
Timer Y
Timer 1
Timer 2
Serial I/O1
reception
Serial I/O1
transmission
Over current
detection
CNTR0
Valid when serial I/O1 is selected
FFEE16
FFEC16
FFEA16
FFE816
FFE616
FFE416
FFE216
FFE016
FFDE16
FFEF16
FFED16
FFEB16
FFE916
FFE716
FFE516
FFE316
FFE116
FFDF16
FFDC16
FFDD16
8
9
10
11
At detection of either rising or
falling edge of INT3 input
At completion of serial I/O2 data
reception
Valid when serial I/O2 is selected
At completion of data transfer
At timer X underflow
At timer Y underflow
At timer 1 underflow
At timer 2 underflow
At completion of serial I/O1 data
reception
At completion of serial I/O1
transfer shift or when transmis-
sion buffer is empty
At short current is detected, at
over current is detected, or at
wake up current is detected.
At detection of either rising or
falling edge of CNTR0 input
At detection of either rising or
falling edge of CNTR1 input
STP release timer underflow
CNTR1
A/D converter
At completion of A/D conversion
Valid when short current detector
or over current detector, or wake
up current detector is selected.
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
Valid when current integrator is
selected
Non-maskable software interrupt
Current integration
BRK instruction
At end of current integration
period, or at end of calibration
At BRK instruction execution
12
13
14
15
16
17
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