- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98004 > M30245FCGP 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100 PDF資料下載
參數(shù)資料
| 型號： | M30245FCGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 69/244頁 |
| 文件大小： | 3535K |
| 代理商： | M30245FCGP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁當(dāng)前第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁第211頁第212頁第213頁第214頁第215頁第216頁第217頁第218頁第219頁第220頁第221頁第222頁第223頁第224頁第225頁第226頁第227頁第228頁第229頁第230頁第231頁第232頁第233頁第234頁第235頁第236頁第237頁第238頁第239頁第240頁第241頁第242頁第243頁第244頁
Serial Communication
Specifications in this manual are tentative and subject to change
Rev. E
MITSUBISHI MICROCOMPUTERS
M30245 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
160
Overview
The Serial Sound Interface is a serial data communication system. The parallel (MCU bus) to serial data
conversion is accomplished by the shift registers. Figure 1.121 shows a description of each component of
the Serial Sound Interface architecture. There are separate 32- bit shift registers for transmit and receive for
full duplex operation. Each shift register can be configured for 32, 24, or 16 bits as defined by the channel
width mode bits. The shift register loads (or stores for receiver) data from the data buffers on every WS
edge. The first load and bit-shift begins on the first “valid” edge of WS (as defined by the mode bits) after
the transmit/receive mode bits are set (see Figure 1.122). Therefore, the transmit data buffers must be
loaded prior to enabling the transmitter to ensure that the first transmit contains valid data.
Both the transmitter and receiver have their own set of data buffers. There are two data buffers (left and
right) so that, on special conditions when the MCU is handling a higher priority task, additional time is
available (channel width X TSCK) before there is data underflow or overflow. The shift register always loads
from or stores to the left buffer first and alternates between the two buffers on every edge of WS. The
placement of data within the buffers is described in detail in the Data Path section.
The interrupt generator is a state machine which controls the data interface. The state machine makes the
data transfer to or from the peripheral more efficient by generating interrupts until all the data needed for the
data buffer has been accessed. The interrupt can be set up to be a DMA trigger for more efficient data
transfer. The interrupt generator also tracks the read/write width (byte/word) so that no additional control is
needed. The interrupt is first generated when a data word is loaded from the data buffer to the shift register
(transmitter) or data are stored from the shift register into the data buffer (receiver). When the MCU is
finished accessing (as a response to the interrupt) another interrupt is generated if the data buffer has not
completely been accessed. For example, for a 24-bit transmitter, an interrupt is generated when the left
buffer is loaded into the shift register. If the MCU writes a byte of data to the transmit buffer address, 8 of
the 24 bits will be filled with new data. The interrupt generator triggers another interrupt causing the MCU to
write more data. If this write is a 16-bit operation, no further interrupts are generated until the right buffer is
loaded into the shift register. However, if the write operation is only 8 bit, then another interrupt is generated
immediately.
The data interface is used to simplify the data transfer process. The data buffer address is the same
regardless of the actual data buffer width. The interface places the incoming or outgoing data in the correct
position according to the channel width and the number of completed reads/writes for the data buffer.
The operation of the data interface is demonstrated in the example below which is the case of 24-bit audio
data with word writes. As previously explained, the state machine generates an interrupt when the left
channel is loaded into the shift register for transmission. When the first word write occurs, the data interface
places the data in the left buffer. Since 8 more bits are required to fully load the left buffer, another interrupt
is generated. The MCU writes another word of data, of which one byte is placed in the left buffer. However,
the remaining data is held in a temporary buffer within the data interface since the right channel may not be
loaded into the shift register yet. If the data is not held in a temporary buffer but written to the right buffer, it
would overwrite the untransmitted data in the right buffer. When the right buffer is eventually loaded into the
shift register for transmission, the state machine generates an interrupt to request additional data. An MCU
word write causes the data in the temporary buffer, as well as the data on the MCU data bus, to be placed
in the right buffer. No further interrupts are generated because all data buffers are filled.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M30621FCAGP | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP80 |
| M30625MGM-XXXGP | 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP80 |
| M30621MCM-XXXGP | 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP80 |
| M30621FCMGP | 16-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP80 |
| M3062GF8NGP | 16-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M30245FCGP#U1 | 功能描述:IC M16C/24 MCU FLSH 128K 100LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M16C™ M16C/20 標(biāo)準(zhǔn)包裝:1 系列:87C 核心處理器:MCS 51 芯體尺寸:8-位 速度:16MHz 連通性:SIO 外圍設(shè)備:- 輸入/輸出數(shù):32 程序存儲器容量:8KB（8K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:外部 工作溫度:0°C ~ 70°C 封裝/外殼:44-DIP 包裝:管件 其它名稱:864285 |
| M30245FC-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30245FC-XXXGF | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30245FC-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30245FG | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。